From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B02A8C32771 for ; Mon, 20 Jan 2020 03:49:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8EB8A20684 for ; Mon, 20 Jan 2020 03:49:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729030AbgATDto (ORCPT ); Sun, 19 Jan 2020 22:49:44 -0500 Received: from mail-sz.amlogic.com ([211.162.65.117]:13027 "EHLO mail-sz.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729015AbgATDto (ORCPT ); Sun, 19 Jan 2020 22:49:44 -0500 Received: from droid15-sz.amlogic.com (10.28.8.25) by mail-sz.amlogic.com (10.28.11.5) with Microsoft SMTP Server id 15.1.1591.10; Mon, 20 Jan 2020 11:50:11 +0800 From: Jian Hu To: Jerome Brunet , Neil Armstrong CC: Jian Hu , Kevin Hilman , Rob Herring , Martin Blumenstingl , Michael Turquette , Stephen Boyd , Qiufang Dai , Jianxin Pan , Victor Wan , Chandle Zou , , , , , Subject: [PATCH v7 0/5] add Amlogic A1 clock controller driver Date: Mon, 20 Jan 2020 11:49:32 +0800 Message-ID: <20200120034937.128600-1-jian.hu@amlogic.com> X-Mailer: git-send-email 2.24.0 MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [10.28.8.25] Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org add support for Amlogic A1 clock driver, the clock includes three parts: peripheral clocks, pll clocks, CPU clocks. sys pll and CPU clocks will be sent in next patch. Changes since v6 at [7]: -fix 'dt_binding_check' compiling error -add acked-by Changes since v5 at [6]: -fix yaml file -add rst/current_en/l_detect parm detection -remove 'meson_eeclkc_data' in a1.c and a1-pll.c Changes since v4 at [5]: - change yaml GPL - drop meson-eeclk.c patch, add probe function in each driver - add CLK_IS_CRITICAL for sys_clk clock, drop the flag for sys_a and sys_b - add new parm for pll, add protection for rst parm - drop flag for a1_fixed_pll - remove the same comment for fclk_div, add "refer to" - add critical flag for a1_sys_clk - remove rtc table - rename a1_dspa_en_dspa and a1_dspb_en_dspb - remove useless comment Changes since v3 at [3]: -fix reparenting orphan failed, it depends on jerome's patch [4] -fix changelist in v3 about reparenting orphan -remove the dts patch Changes since v2 at [2]: -add probe function for A1 -seperate the clock driver into two patch -change some clock flags and ops -add support for a1 PLL ops -add A1 clock node -fix reparenting orphan clock failed, registering xtal_fixpll and xtal_hifipll after the provider registration, it is not a best way. Changes since v1 at [1]: -place A1 config alphabetically -add actual reason for RO ops, CLK_IS_CRITICAL, CLK_IGNORE_UNUSED -separate the driver into two driver: peripheral and pll driver -delete CLK_IGNORE_UNUSED flag for pwm b/c/d/e/f clock, dsp clock -delete the change in Kconfig.platforms, address to Kevin alone -remove the useless comments -modify the meson pll driver to support A1 PLLs [1] https://lkml.kernel.org/r/1569411888-98116-1-git-send-email-jian.hu@amlogic.com [2] https://lkml.kernel.org/r/1571382865-41978-1-git-send-email-jian.hu@amlogic.com [3] https://lkml.kernel.org/r/20191129144605.182774-1-jian.hu@amlogic.com [4] https://lkml.kernel.org/r/20191203080805.104628-1-jbrunet@baylibre.com [5] https://lkml.kernel.org/r/20191206074052.15557-1-jian.hu@amlogic.com [6] https://lkml.kernel.org/r/20191227094606.143637-1-jian.hu@amlogic.com [7] https://lkml.kernel.org/r/20200116080440.118679-1-jian.hu@amlogic.com Jian Hu (5): dt-bindings: clock: meson: add A1 PLL clock controller bindings clk: meson: add support for A1 PLL clock ops clk: meson: a1: add support for Amlogic A1 PLL clock driver dt-bindings: clock: meson: add A1 peripheral clock controller bindings clk: meson: a1: add support for Amlogic A1 Peripheral clock driver .../bindings/clock/amlogic,a1-clkc.yaml | 65 + .../bindings/clock/amlogic,a1-pll-clkc.yaml | 52 + drivers/clk/meson/Kconfig | 18 + drivers/clk/meson/Makefile | 2 + drivers/clk/meson/a1-pll.c | 360 +++ drivers/clk/meson/a1-pll.h | 56 + drivers/clk/meson/a1.c | 2249 +++++++++++++++++ drivers/clk/meson/a1.h | 120 + drivers/clk/meson/clk-pll.c | 47 +- drivers/clk/meson/clk-pll.h | 2 + include/dt-bindings/clock/a1-clkc.h | 98 + include/dt-bindings/clock/a1-pll-clkc.h | 16 + 12 files changed, 3078 insertions(+), 7 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-clkc.yaml create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml create mode 100644 drivers/clk/meson/a1-pll.c create mode 100644 drivers/clk/meson/a1-pll.h create mode 100644 drivers/clk/meson/a1.c create mode 100644 drivers/clk/meson/a1.h create mode 100644 include/dt-bindings/clock/a1-clkc.h create mode 100644 include/dt-bindings/clock/a1-pll-clkc.h -- 2.24.0