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From: Dmitry Osipenko <digetx@gmail.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
	"Jonathan Hunter" <jonathanh@nvidia.com>,
	"Peter De Schrijver" <pdeschrijver@nvidia.com>,
	"Prashant Gaikwad" <pgaikwad@nvidia.com>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	"Viresh Kumar" <viresh.kumar@linaro.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Peter Geis" <pgwipeout@gmail.com>,
	"Nicolas Chauvet" <kwizart@gmail.com>,
	"Marcel Ziswiler" <marcel.ziswiler@toradex.com>,
	"Michał Mirosław" <mirq-linux@rere.qmqm.pl>,
	"Jasper Korten" <jja2000@gmail.com>,
	"David Heidelberg" <david@ixit.cz>
Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v7 08/12] dt-bindings: cpufreq: Add binding for NVIDIA Tegra20/30
Date: Thu, 13 Feb 2020 02:46:03 +0300
Message-ID: <20200212234607.11521-9-digetx@gmail.com> (raw)
In-Reply-To: <20200212234607.11521-1-digetx@gmail.com>

Add device-tree binding that describes CPU frequency-scaling hardware
found on NVIDIA Tegra20/30 SoCs.

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Marcel Ziswiler <marcel@ziswiler.com>
Tested-by: Jasper Korten <jja2000@gmail.com>
Tested-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
---
 .../cpufreq/nvidia,tegra20-cpufreq.txt        | 56 +++++++++++++++++++
 1 file changed, 56 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/cpufreq/nvidia,tegra20-cpufreq.txt

diff --git a/Documentation/devicetree/bindings/cpufreq/nvidia,tegra20-cpufreq.txt b/Documentation/devicetree/bindings/cpufreq/nvidia,tegra20-cpufreq.txt
new file mode 100644
index 000000000000..daeca6ae6b76
--- /dev/null
+++ b/Documentation/devicetree/bindings/cpufreq/nvidia,tegra20-cpufreq.txt
@@ -0,0 +1,56 @@
+Binding for NVIDIA Tegra20 CPUFreq
+==================================
+
+Required properties:
+- clocks: Must contain an entry for the CPU clock.
+  See ../clocks/clock-bindings.txt for details.
+- operating-points-v2: See ../bindings/opp/opp.txt for details.
+- #cooling-cells: Should be 2. See ../thermal/thermal.txt for details.
+
+For each opp entry in 'operating-points-v2' table:
+- opp-supported-hw: Two bitfields indicating:
+	On Tegra20:
+	1. CPU process ID mask
+	2. SoC speedo ID mask
+
+	On Tegra30:
+	1. CPU process ID mask
+	2. CPU speedo ID mask
+
+	A bitwise AND is performed against these values and if any bit
+	matches, the OPP gets enabled.
+
+- opp-microvolt: CPU voltage triplet.
+
+Optional properties:
+- cpu-supply: Phandle to the CPU power supply.
+
+Example:
+	regulators {
+		cpu_reg: regulator0 {
+			regulator-name = "vdd_cpu";
+		};
+	};
+
+	cpu0_opp_table: opp_table0 {
+		compatible = "operating-points-v2";
+
+		opp@456000000 {
+			clock-latency-ns = <125000>;
+			opp-microvolt = <825000 825000 1125000>;
+			opp-supported-hw = <0x03 0x0001>;
+			opp-hz = /bits/ 64 <456000000>;
+		};
+
+		...
+	};
+
+	cpus {
+		cpu@0 {
+			compatible = "arm,cortex-a9";
+			clocks = <&tegra_car TEGRA20_CLK_CCLK>;
+			operating-points-v2 = <&cpu0_opp_table>;
+			cpu-supply = <&cpu_reg>;
+			#cooling-cells = <2>;
+		};
+	};
-- 
2.24.0


  parent reply index

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-12 23:45 [PATCH v7 00/12] NVIDIA Tegra20 CPUFreq driver major update Dmitry Osipenko
2020-02-12 23:45 ` [PATCH v7 01/12] clk: tegra: Add custom CCLK implementation Dmitry Osipenko
2020-02-12 23:45 ` [PATCH v7 02/12] clk: tegra: pll: Add pre/post rate-change hooks Dmitry Osipenko
2020-02-12 23:45 ` [PATCH v7 03/12] clk: tegra: cclk: Add helpers for handling PLLX rate changes Dmitry Osipenko
2020-02-12 23:45 ` [PATCH v7 04/12] clk: tegra20: Use custom CCLK implementation Dmitry Osipenko
2020-02-12 23:46 ` [PATCH v7 05/12] clk: tegra30: " Dmitry Osipenko
2020-02-12 23:46 ` [PATCH v7 06/12] ARM: tegra: Switch CPU to PLLP on resume from LP1 on Tegra30/114/124 Dmitry Osipenko
2020-02-12 23:46 ` [PATCH v7 07/12] ARM: tegra: Don't enable PLLX while resuming from LP1 on Tegra30 Dmitry Osipenko
2020-02-12 23:46 ` Dmitry Osipenko [this message]
2020-02-12 23:46 ` [PATCH v7 09/12] cpufreq: tegra20: Use generic cpufreq-dt driver (Tegra30 supported now) Dmitry Osipenko
2020-02-12 23:46 ` [PATCH v7 10/12] ARM: tegra: Create tegra20-cpufreq platform device on Tegra30 Dmitry Osipenko
2020-02-12 23:46 ` [PATCH v7 11/12] ARM: dts: tegra30: beaver: Set up voltage regulators for DVFS Dmitry Osipenko
2020-02-12 23:46 ` [PATCH v7 12/12] ARM: dts: tegra30: beaver: Add CPU Operating Performance Points Dmitry Osipenko

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