From: Jonathan Marek <jonathan@marek.ca>
To: linux-arm-msm@vger.kernel.org
Cc: Andy Gross <agross@kernel.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-clk@vger.kernel.org (open list:COMMON CLK FRAMEWORK),
linux-kernel@vger.kernel.org (open list)
Subject: [PATCH 03/10] clk: qcom: clk-alpha-pll: use the right PCAL_DONE value for lucid pll
Date: Sun, 24 May 2020 17:06:04 -0400 [thread overview]
Message-ID: <20200524210615.17035-4-jonathan@marek.ca> (raw)
In-Reply-To: <20200524210615.17035-1-jonathan@marek.ca>
Lucid PCAL_DONE is different from trion.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
---
drivers/clk/qcom/clk-alpha-pll.c | 28 ++++++++++++++++++++++++++--
drivers/clk/qcom/clk-alpha-pll.h | 2 +-
2 files changed, 27 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
index be7ffeae21b1..26139ef005e4 100644
--- a/drivers/clk/qcom/clk-alpha-pll.c
+++ b/drivers/clk/qcom/clk-alpha-pll.c
@@ -143,6 +143,9 @@ EXPORT_SYMBOL_GPL(clk_alpha_pll_regs);
#define TRION_PLL_CAL_VAL 0x44
#define TRION_PCAL_DONE BIT(26)
+/* LUCID PLL specific settings and offsets */
+#define LUCID_PCAL_DONE BIT(27)
+
#define pll_alpha_width(p) \
((PLL_ALPHA_VAL_U(p) - PLL_ALPHA_VAL(p) == 4) ? \
ALPHA_REG_BITWIDTH : ALPHA_REG_16BIT_WIDTH)
@@ -1447,7 +1450,7 @@ EXPORT_SYMBOL_GPL(clk_trion_pll_configure);
* The TRION PLL requires a power-on self-calibration which happens when the
* PLL comes out of reset. Calibrate in case it is not completed.
*/
-static int alpha_pll_trion_prepare(struct clk_hw *hw)
+static int __alpha_pll_trion_prepare(struct clk_hw *hw, u32 pcal_done)
{
struct clk_alpha_pll *pll = to_clk_alpha_pll(hw);
u32 regval;
@@ -1455,7 +1458,7 @@ static int alpha_pll_trion_prepare(struct clk_hw *hw)
/* Return early if calibration is not needed. */
regmap_read(pll->clkr.regmap, PLL_STATUS(pll), ®val);
- if (regval & TRION_PCAL_DONE)
+ if (regval & pcal_done)
return 0;
/* On/off to calibrate */
@@ -1466,6 +1469,16 @@ static int alpha_pll_trion_prepare(struct clk_hw *hw)
return ret;
}
+static int alpha_pll_trion_prepare(struct clk_hw *hw)
+{
+ return __alpha_pll_trion_prepare(hw, TRION_PCAL_DONE);
+}
+
+static int alpha_pll_lucid_prepare(struct clk_hw *hw)
+{
+ return __alpha_pll_trion_prepare(hw, LUCID_PCAL_DONE);
+}
+
static int alpha_pll_trion_set_rate(struct clk_hw *hw, unsigned long rate,
unsigned long prate)
{
@@ -1529,6 +1542,17 @@ const struct clk_ops clk_alpha_pll_trion_ops = {
.round_rate = clk_alpha_pll_round_rate,
.set_rate = alpha_pll_trion_set_rate,
};
+EXPORT_SYMBOL_GPL(clk_alpha_pll_trion_ops);
+
+const struct clk_ops clk_alpha_pll_lucid_ops = {
+ .prepare = alpha_pll_lucid_prepare,
+ .enable = clk_trion_pll_enable,
+ .disable = clk_trion_pll_disable,
+ .is_enabled = clk_trion_pll_is_enabled,
+ .recalc_rate = clk_trion_pll_recalc_rate,
+ .round_rate = clk_alpha_pll_round_rate,
+ .set_rate = alpha_pll_trion_set_rate,
+};
EXPORT_SYMBOL_GPL(clk_alpha_pll_lucid_ops);
const struct clk_ops clk_alpha_pll_postdiv_lucid_ops = {
diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h
index 67f1fd271931..69337c1b5850 100644
--- a/drivers/clk/qcom/clk-alpha-pll.h
+++ b/drivers/clk/qcom/clk-alpha-pll.h
@@ -132,7 +132,7 @@ extern const struct clk_ops clk_alpha_pll_trion_ops;
extern const struct clk_ops clk_alpha_pll_fixed_trion_ops;
extern const struct clk_ops clk_alpha_pll_postdiv_trion_ops;
-#define clk_alpha_pll_lucid_ops clk_alpha_pll_trion_ops
+extern const struct clk_ops clk_alpha_pll_lucid_ops;
#define clk_alpha_pll_fixed_lucid_ops clk_alpha_pll_fixed_trion_ops
extern const struct clk_ops clk_alpha_pll_postdiv_lucid_ops;
--
2.26.1
next prev parent reply other threads:[~2020-05-24 21:06 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-24 21:06 [PATCH 00/10] Enable GPU for SM8150 and SM8250 Jonathan Marek
2020-05-24 21:06 ` [PATCH 01/10] clk: qcom: clk-alpha-pll: remove unused/incorrect PLL_CAL_VAL Jonathan Marek
2020-05-26 23:21 ` Stephen Boyd
2020-05-26 23:30 ` Jonathan Marek
2020-05-27 2:42 ` Stephen Boyd
2020-05-24 21:06 ` [PATCH 02/10] clk: qcom: clk-alpha-pll: same regs and ops for trion and lucid Jonathan Marek
2020-05-24 21:06 ` Jonathan Marek [this message]
2020-05-24 21:06 ` [PATCH 04/10] clk: qcom: gcc: remove unnecessary vco_table from SM8150 Jonathan Marek
2020-05-24 21:06 ` [PATCH 07/10] clk: qcom: Add graphics clock controller driver for SM8150 Jonathan Marek
2020-05-27 8:44 ` Stephen Boyd
2020-06-29 17:27 ` Jonathan Marek
2020-05-24 21:06 ` [PATCH 08/10] clk: qcom: Add graphics clock controller driver for SM8250 Jonathan Marek
2020-05-25 9:47 ` Sai Prakash Ranjan
2020-05-29 1:11 ` Bjorn Andersson
2020-05-29 6:56 ` Sai Prakash Ranjan
2020-06-03 18:09 ` Bjorn Andersson
2020-06-03 18:20 ` Sai Prakash Ranjan
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