From: Michael Tretter <m.tretter@pengutronix.de>
To: linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org
Cc: rajanv@xilinx.com, tejasp@xilinx.com, dshah@xilinx.com,
rvisaval@xilinx.com, michals@xilinx.com, kernel@pengutronix.de,
robh+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org,
Michael Tretter <m.tretter@pengutronix.de>
Subject: [PATCH 00/12] soc: xilinx: vcu: Convert driver to clock provider
Date: Mon, 16 Nov 2020 08:55:20 +0100 [thread overview]
Message-ID: <20201116075532.4019252-1-m.tretter@pengutronix.de> (raw)
Hello,
the xlnx_vcu soc driver is actually a clock provider of a PLL and four output
clocks created from the PLL via dividers.
This series reworks the xlnx_vcu driver to use the common clock framework to
enable other drivers to use the clocks. I originally posted a series to expose
the output clocks as fixed clocks [0]. This series now implements the full
tree from the PLL to the output clocks. Therefore, I am sending a separate
series that focuses on the clocks, but it depends on v4 of the previous series
[1].
Possible consumers for the clocks are the allegro-dvt video encoder driver or
the Xilinx Video Codec Unit [2] out of tree driver.
Patch 1 defines the identifiers that shall be used by clock consumers in the
device tree.
Patch 2 fixes the generic clk-divider to correctly use parents that are passed
via struct clk_hw instead of the clock name.
Patches 3-6 refactor the existing driver and split the function to configure
the PLL into smaller helper functions.
Patch 7 registers a fixed rate clock for the PLL. The driver calculated and
set the PLL configuration during probe, and exposing a fixed rate clock for
that rate allows to use the existing configuration with output clocks from the
common clock framework.
Patches 8-10 switch the driver to the common clock framework and register the
clock provider.
Patches 11-12 are cleanup patches.
Michael
[0] https://lore.kernel.org/linux-arm-kernel/20200619075913.18900-1-m.tretter@pengutronix.de/
[1] https://lore.kernel.org/linux-arm-kernel/20201109134818.4159342-3-m.tretter@pengutronix.de/
[2] https://github.com/Xilinx/vcu-modules
Michael Tretter (12):
ARM: dts: define indexes for output clocks
clk: divider: fix initialization with parent_hw
soc: xilinx: vcu: drop coreclk from struct xlnx_vcu
soc: xilinx: vcu: add helper to wait for PLL locked
soc: xilinx: vcu: add helpers for configuring PLL
soc: xilinx: vcu: implement PLL disable
soc: xilinx: vcu: register PLL as fixed rate clock
soc: xilinx: vcu: implement clock provider for output clocks
soc: xilinx: vcu: make pll post divider explicit
soc: xilinx: vcu: make the PLL configurable
soc: xilinx: vcu: remove calculation of PLL configuration
soc: xilinx: vcu: use bitfields for register definition
drivers/clk/clk-divider.c | 9 +-
drivers/soc/xilinx/Kconfig | 2 +-
drivers/soc/xilinx/xlnx_vcu.c | 613 ++++++++++++++++-----------
include/dt-bindings/clock/xlnx-vcu.h | 15 +
4 files changed, 383 insertions(+), 256 deletions(-)
create mode 100644 include/dt-bindings/clock/xlnx-vcu.h
--
2.20.1
next reply other threads:[~2020-11-16 8:03 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-16 7:55 Michael Tretter [this message]
2020-11-16 7:55 ` [PATCH 01/12] ARM: dts: define indexes for output clocks Michael Tretter
2020-12-02 14:33 ` Michal Simek
2020-12-07 19:21 ` Rob Herring
2020-12-13 5:44 ` Stephen Boyd
2020-11-16 7:55 ` [PATCH 02/12] clk: divider: fix initialization with parent_hw Michael Tretter
2020-12-02 14:28 ` Michal Simek
2020-12-13 5:42 ` Stephen Boyd
2020-11-16 7:55 ` [PATCH 03/12] soc: xilinx: vcu: drop coreclk from struct xlnx_vcu Michael Tretter
2020-11-16 7:55 ` [PATCH 04/12] soc: xilinx: vcu: add helper to wait for PLL locked Michael Tretter
2020-11-16 7:55 ` [PATCH 05/12] soc: xilinx: vcu: add helpers for configuring PLL Michael Tretter
2020-11-16 7:55 ` [PATCH 06/12] soc: xilinx: vcu: implement PLL disable Michael Tretter
2020-11-16 7:55 ` [PATCH 07/12] soc: xilinx: vcu: register PLL as fixed rate clock Michael Tretter
2020-12-02 14:41 ` Michal Simek
2020-11-16 7:55 ` [PATCH 08/12] soc: xilinx: vcu: implement clock provider for output clocks Michael Tretter
2020-12-02 14:49 ` Michal Simek
2020-12-13 5:55 ` Stephen Boyd
2020-12-15 11:38 ` Michael Tretter
2020-12-16 1:09 ` Stephen Boyd
2020-12-21 9:18 ` Michael Tretter
2020-11-16 7:55 ` [PATCH 09/12] soc: xilinx: vcu: make pll post divider explicit Michael Tretter
2020-12-02 14:51 ` Michal Simek
2020-11-16 7:55 ` [PATCH 10/12] soc: xilinx: vcu: make the PLL configurable Michael Tretter
2020-12-02 14:54 ` Michal Simek
2020-11-16 7:55 ` [PATCH 11/12] soc: xilinx: vcu: remove calculation of PLL configuration Michael Tretter
2020-11-16 7:55 ` [PATCH 12/12] soc: xilinx: vcu: use bitfields for register definition Michael Tretter
2020-12-13 5:47 ` Stephen Boyd
2020-12-03 7:46 ` [PATCH 00/12] soc: xilinx: vcu: Convert driver to clock provider Michal Simek
2020-12-03 9:00 ` Michael Tretter
2020-12-03 9:14 ` Michal Simek
2020-12-13 5:50 ` Stephen Boyd
2020-12-15 11:56 ` Michael Tretter
2020-12-16 2:37 ` Stephen Boyd
2020-12-21 9:19 ` Michael Tretter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201116075532.4019252-1-m.tretter@pengutronix.de \
--to=m.tretter@pengutronix.de \
--cc=devicetree@vger.kernel.org \
--cc=dshah@xilinx.com \
--cc=kernel@pengutronix.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=michals@xilinx.com \
--cc=mturquette@baylibre.com \
--cc=rajanv@xilinx.com \
--cc=robh+dt@kernel.org \
--cc=rvisaval@xilinx.com \
--cc=sboyd@kernel.org \
--cc=tejasp@xilinx.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).