From: Damien Le Moal <damien.lemoal@wdc.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
linux-riscv@lists.infradead.org, Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org, Stephen Boyd <sboyd@kernel.org>,
linux-clk@vger.kernel.org,
Linus Walleij <linus.walleij@linaro.org>,
linux-gpio@vger.kernel.org,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: Sean Anderson <seanga2@gmail.com>
Subject: [PATCH v5 02/21] riscv: Fix sifive serial driver
Date: Tue, 8 Dec 2020 16:33:36 +0900 [thread overview]
Message-ID: <20201208073355.40828-3-damien.lemoal@wdc.com> (raw)
In-Reply-To: <20201208073355.40828-1-damien.lemoal@wdc.com>
Setup the port uartclk in sifive_serial_probe() so that the base baud
rate is correctly printed during device probe instead of always showing
"0". I.e. the probe message is changed from
38000000.serial: ttySIF0 at MMIO 0x38000000 (irq = 1,
base_baud = 0) is a SiFive UART v0
to the correct:
38000000.serial: ttySIF0 at MMIO 0x38000000 (irq = 1,
base_baud = 115200) is a SiFive UART v0
Signed-off-by: Damien Le Moal <damien.lemoal@wdc.com>
---
drivers/tty/serial/sifive.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/tty/serial/sifive.c b/drivers/tty/serial/sifive.c
index 13eadcb8aec4..214bf3086c68 100644
--- a/drivers/tty/serial/sifive.c
+++ b/drivers/tty/serial/sifive.c
@@ -999,6 +999,7 @@ static int sifive_serial_probe(struct platform_device *pdev)
/* Set up clock divider */
ssp->clkin_rate = clk_get_rate(ssp->clk);
ssp->baud_rate = SIFIVE_DEFAULT_BAUD_RATE;
+ ssp->port.uartclk = ssp->baud_rate * 16;
__ssp_update_div(ssp);
platform_set_drvdata(pdev, ssp);
--
2.28.0
next prev parent reply other threads:[~2020-12-08 7:35 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-08 7:33 [PATCH v5 00/21] RISC-V Kendryte K210 support improvements Damien Le Moal
2020-12-08 7:33 ` [PATCH v5 01/21] riscv: Fix kernel time_init() Damien Le Moal
2020-12-08 7:33 ` Damien Le Moal [this message]
2020-12-08 7:33 ` [PATCH v5 03/21] riscv: Enable interrupts during syscalls with M-Mode Damien Le Moal
2020-12-08 7:33 ` [PATCH v5 04/21] riscv: Fix builtin DTB handling Damien Le Moal
2020-12-08 7:33 ` [PATCH v5 05/21] riscv: Use vendor name for K210 SoC support Damien Le Moal
2020-12-08 7:33 ` [PATCH v5 06/21] dt-bindings: Add Canaan vendor prefix Damien Le Moal
2020-12-08 7:33 ` [PATCH v5 07/21] dt-binding: clock: Document canaan,k210-clk bindings Damien Le Moal
2020-12-08 7:33 ` [PATCH v5 08/21] dt-bindings: reset: Document canaan,k210-rst bindings Damien Le Moal
2020-12-08 7:33 ` [PATCH v5 09/21] dt-bindings: pinctrl: Document canaan,k210-fpioa bindings Damien Le Moal
2020-12-08 7:33 ` [PATCH v5 10/21] dt-binding: mfd: Document canaan,k210-sysctl bindings Damien Le Moal
2020-12-08 7:33 ` [PATCH v5 11/21] riscv: Add Canaan Kendryte K210 clock driver Damien Le Moal
2020-12-08 7:33 ` [PATCH v5 12/21] riscv: Add Canaan Kendryte K210 reset controller Damien Le Moal
2020-12-08 11:44 ` Philipp Zabel
2020-12-09 5:26 ` Damien Le Moal
2020-12-09 11:29 ` Philipp Zabel
2020-12-08 7:33 ` [PATCH v5 13/21] riscv: Add Canaan Kendryte K210 FPIOA driver Damien Le Moal
2020-12-08 7:33 ` [PATCH v5 14/21] riscv: Update Canaan Kendryte K210 device tree Damien Le Moal
2020-12-08 7:33 ` [PATCH v5 15/21] riscv: Add SiPeed MAIX BiT board " Damien Le Moal
2020-12-08 7:33 ` [PATCH v5 16/21] riscv: Add SiPeed MAIX DOCK " Damien Le Moal
2020-12-08 7:33 ` [PATCH v5 17/21] riscv: Add SiPeed MAIX GO " Damien Le Moal
2020-12-08 7:33 ` [PATCH v5 18/21] riscv: Add SiPeed MAIXDUINO " Damien Le Moal
2020-12-08 7:33 ` [PATCH v5 19/21] riscv: Add Kendryte KD233 " Damien Le Moal
2020-12-08 7:33 ` [PATCH v5 20/21] riscv: Update Canaan Kendryte K210 defconfig Damien Le Moal
2020-12-08 7:33 ` [PATCH v5 21/21] riscv: Add Canaan Kendryte K210 SD card defconfig Damien Le Moal
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