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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org,
	jassisinghbrar@gmail.com
Cc: viresh.kumar@linaro.org, ulf.hansson@linaro.org,
	bjorn.andersson@linaro.org, agross@kernel.org,
	linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: [PATCH 2/5] mailbox: qcom: Add support for SDX55 APCS IPC
Date: Mon,  4 Jan 2021 13:41:22 +0530	[thread overview]
Message-ID: <20210104081125.147300-3-manivannan.sadhasivam@linaro.org> (raw)
In-Reply-To: <20210104081125.147300-1-manivannan.sadhasivam@linaro.org>

In SDX55, the IPC bits are located in the APCS GCC block. Also, this block
can provide clock functionality. Hence, add support for IPC with correct
offset and name of the clock provider.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
 drivers/mailbox/qcom-apcs-ipc-mailbox.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c b/drivers/mailbox/qcom-apcs-ipc-mailbox.c
index 077e5c6a9ef7..b00556450335 100644
--- a/drivers/mailbox/qcom-apcs-ipc-mailbox.c
+++ b/drivers/mailbox/qcom-apcs-ipc-mailbox.c
@@ -61,6 +61,10 @@ static const struct qcom_apcs_ipc_data apps_shared_apcs_data = {
 	.offset = 12, .clk_name = NULL
 };
 
+static const struct qcom_apcs_ipc_data sdx55_apcs_data = {
+	.offset = 0x1008, .clk_name = "qcom-sdx55-acps-clk"
+};
+
 static const struct regmap_config apcs_regmap_config = {
 	.reg_bits = 32,
 	.reg_stride = 4,
@@ -162,6 +166,7 @@ static const struct of_device_id qcom_apcs_ipc_of_match[] = {
 	{ .compatible = "qcom,sdm660-apcs-hmss-global", .data = &sdm660_apcs_data },
 	{ .compatible = "qcom,sdm845-apss-shared", .data = &apps_shared_apcs_data },
 	{ .compatible = "qcom,sm8150-apss-shared", .data = &apps_shared_apcs_data },
+	{ .compatible = "qcom,sdx55-apcs-gcc", .data = &sdx55_apcs_data },
 	{}
 };
 MODULE_DEVICE_TABLE(of, qcom_apcs_ipc_of_match);
-- 
2.25.1


  parent reply	other threads:[~2021-01-04  8:13 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-04  8:11 [PATCH 0/5] Add APCS support for SDX55 Manivannan Sadhasivam
2021-01-04  8:11 ` [PATCH 1/5] dt-bindings: mailbox: Add binding for SDX55 APCS Manivannan Sadhasivam
2021-01-04  8:11 ` Manivannan Sadhasivam [this message]
2021-01-04  8:11 ` [PATCH 3/5] dt-bindings: clock: Add Qualcomm A7 PLL binding Manivannan Sadhasivam
2021-01-04  8:11 ` [PATCH 4/5] clk: qcom: Add A7 PLL support Manivannan Sadhasivam
2021-01-04 15:30   ` Konrad Dybcio
2021-01-08 11:14     ` Manivannan Sadhasivam
2021-01-04  8:11 ` [PATCH 5/5] clk: qcom: Add SDX55 APCS clock controller support Manivannan Sadhasivam

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