From: Dario Binacchi <dariobin@libero.it>
To: linux-kernel@vger.kernel.org
Cc: Dario Binacchi <dariobin@libero.it>,
Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh+dt@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
devicetree@vger.kernel.org, linux-clk@vger.kernel.org
Subject: [PATCH 2/4] dt-bindings: ti: dpll: add spread spectrum support
Date: Sun, 14 Mar 2021 16:12:31 +0100 [thread overview]
Message-ID: <20210314151233.23243-3-dariobin@libero.it> (raw)
In-Reply-To: <20210314151233.23243-1-dariobin@libero.it>
DT bindings for enabling and adjusting spread spectrum clocking have
been added.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
---
.../devicetree/bindings/clock/ti/dpll.txt | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/ti/dpll.txt b/Documentation/devicetree/bindings/clock/ti/dpll.txt
index df57009ff8e7..0810ae073294 100644
--- a/Documentation/devicetree/bindings/clock/ti/dpll.txt
+++ b/Documentation/devicetree/bindings/clock/ti/dpll.txt
@@ -42,6 +42,11 @@ Required properties:
"idlest" - contains the idle status register base address
"mult-div1" - contains the multiplier / divider register base address
"autoidle" - contains the autoidle register base address (optional)
+ "ssc-deltam" - DPLL supports spread spectrum clocking (SSC), contains
+ the frequency spreading register base address (optional)
+ "ssc-modfreq" - DPLL supports spread spectrum clocking (SSC), contains
+ the modulation frequency register base address
+ (optional)
ti,am3-* dpll types do not have autoidle register
ti,omap2-* dpll type does not support idlest / autoidle registers
@@ -51,6 +56,14 @@ Optional properties:
- ti,low-power-stop : DPLL supports low power stop mode, gating output
- ti,low-power-bypass : DPLL output matches rate of parent bypass clock
- ti,lock : DPLL locks in programmed rate
+ - ti,min-div : the minimum divisor to start from to round the DPLL
+ target rate
+ - ti,ssc-deltam : DPLL supports spread spectrum clocking, frequency
+ spreading in permille (10th of a percent)
+ - ti,ssc-modfreq : DPLL supports spread spectrum clocking, spread
+ spectrum modulation frequency in kHz
+ - ti,ssc-downspread : DPLL supports spread spectrum clocking, boolean
+ to enable the downspread feature
Examples:
dpll_core_ck: dpll_core_ck@44e00490 {
@@ -83,3 +96,10 @@ Examples:
clocks = <&sys_ck>, <&sys_ck>;
reg = <0x0500>, <0x0540>;
};
+
+ dpll_disp_ck: dpll_disp_ck {
+ #clock-cells = <0>;
+ compatible = "ti,am3-dpll-no-gate-clock";
+ clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
+ reg = <0x0498>, <0x0448>, <0x0454>, <0x044c>, <0x0450>;
+ };
--
2.17.1
next prev parent reply other threads:[~2021-03-14 15:21 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-14 15:12 [PATCH 0/4] clk: ti: add am33xx spread spectrum clock support Dario Binacchi
2021-03-14 15:12 ` [PATCH 1/4] clk: ti: fix typo in routine description Dario Binacchi
2021-03-14 15:12 ` Dario Binacchi [this message]
2021-03-14 15:12 ` [PATCH 4/4] clk: ti: add am33xx spread spectrum clock support Dario Binacchi
2021-03-16 11:52 ` Grygorii Strashko
2021-03-18 7:38 ` Dario Binacchi
2021-03-18 12:08 ` Grygorii Strashko
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