Hi Nobuhiro,

I love your patch! Perhaps something to improve:

[auto build test WARNING on clk/clk-next]
[also build test WARNING on robh/for-next pza/reset/next linus/master v5.13-rc3 next-20210525]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Nobuhiro-Iwamatsu/clk-visconti-Add-support-common-clock-driver-and-reset-driver/20210525-165001
base:   https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next
config: arm64-randconfig-r014-20210525 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/33e59a6bce486f3cb2bd6f9f4ed2f73a94769196
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Nobuhiro-Iwamatsu/clk-visconti-Add-support-common-clock-driver-and-reset-driver/20210525-165001
        git checkout 33e59a6bce486f3cb2bd6f9f4ed2f73a94769196
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

   drivers/clk/visconti/clkc.c: In function 'visconti_clk_register_gates':
>> drivers/clk/visconti/clkc.c:147:14: warning: variable 'clk' set but not used [-Wunused-but-set-variable]
     147 |  struct clk *clk;
         |              ^~~
--
>> drivers/clk/visconti/pll.c:260:13: warning: no previous prototype for 'visconti_register_pll' [-Wmissing-prototypes]
     260 | struct clk *visconti_register_pll(struct visconti_pll_provider *ctx,
         |             ^~~~~~~~~~~~~~~~~~~~~
--
   drivers/clk/visconti/pll-tmpv770x.c: In function 'tmpv7708_setup_plls':
>> drivers/clk/visconti/pll-tmpv770x.c:63:14: warning: variable 'clk' set but not used [-Wunused-but-set-variable]
      63 |  struct clk *clk;
         |              ^~~
--
   drivers/clk/visconti/clkc-tmpv770x.c: In function 'tmpv7708_clkc_setup_clks':
>> drivers/clk/visconti/clkc-tmpv770x.c:185:14: warning: variable 'clk' set but not used [-Wunused-but-set-variable]
     185 |  struct clk *clk;
         |              ^~~


vim +/clk +147 drivers/clk/visconti/clkc.c

   139	
   140	void visconti_clk_register_gates(struct visconti_clk_provider *data,
   141					 const struct visconti_clk_gate_table *clks,
   142					 int num_gate, const struct visconti_reset_data *reset,
   143					 spinlock_t *lock)
   144	{
   145		u32 rson_offset, rsoff_offset;
   146		struct clk_hw *hw_clk;
 > 147		struct clk *clk;
   148		char *div_name;
   149		u8 rs_idx;
   150		int i;
   151	
   152		for (i = 0; i < num_gate; i++) {
   153			div_name = kasprintf(GFP_KERNEL, "%s_div", clks[i].name);
   154			if (!div_name)
   155				continue;
   156	
   157			if (clks[i].rs_id >= 0) {
   158				rson_offset = reset[clks[i].rs_id].rson_offset;
   159				rsoff_offset = reset[clks[i].rs_id].rsoff_offset;
   160				rs_idx = reset[clks[i].rs_id].rs_idx;
   161			} else {
   162				rson_offset = rsoff_offset = rs_idx = -1;
   163			}
   164	
   165			clk = clk_register_fixed_factor(NULL, div_name, clks[i].parent,
   166							0, 1, clks[i].div);
   167	
   168			hw_clk = visconti_clk_register_gate(NULL,
   169							clks[i].name,
   170							div_name,
   171							data->regmap,
   172							&clks[i],
   173							rson_offset,
   174							rsoff_offset,
   175							rs_idx,
   176							lock);
   177			kfree(div_name);
   178			if (IS_ERR(hw_clk)) {
   179				pr_err("%s: failed to register clock %s\n",
   180				       __func__, clks[i].name);
   181				continue;
   182			}
   183	
   184			data->clk_data.clks[clks[i].id] = hw_clk->clk;
   185		}
   186	}
   187	

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0-DAY CI Kernel Test Service, Intel Corporation
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