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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id k16sm107568otp.19.2021.06.02.10.17.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Jun 2021 10:17:28 -0700 (PDT) Received: (nullmailer pid 3599590 invoked by uid 1000); Wed, 02 Jun 2021 17:17:27 -0000 Date: Wed, 2 Jun 2021 12:17:27 -0500 From: Rob Herring To: Chun-Jie Chen Cc: Matthias Brugger , Stephen Boyd , Nicolas Boichat , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, srv_heupstream@mediatek.com, Project_Global_Chrome_Upstream_Group@mediatek.com, Weiyi Lu Subject: Re: [PATCH v9 03/22] dt-bindings: ARM: Mediatek: Add new document bindings of msdc controller Message-ID: <20210602171727.GA3596715@robh.at.kernel.org> References: <20210524122053.17155-1-chun-jie.chen@mediatek.com> <20210524122053.17155-4-chun-jie.chen@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210524122053.17155-4-chun-jie.chen@mediatek.com> Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org On Mon, May 24, 2021 at 08:20:34PM +0800, Chun-Jie Chen wrote: > This patch adds the new binding documentation of msdc controller > for Mediatek MT8192. This is only additional compatibles. You can combine this with the schema in patch 2. (Unless some blocks are syscon and some aren't) > > Signed-off-by: Weiyi Lu > Signed-off-by: chun-jie.chen > --- > .../bindings/arm/mediatek/mediatek,msdc.yaml | 48 +++++++++++++++++++ > 1 file changed, 48 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml > new file mode 100644 > index 000000000000..10eb43de2d2b > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml > @@ -0,0 +1,48 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,msdc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MediaTek MSDC Controller > + > +maintainers: > + - Chun-Jie Chen > + > +description: > + The Mediatek msdc controller provides functional configurations and clocks to the system. > + > +properties: > + compatible: > + items: > + - enum: > + - mediatek,mt8192-msdc > + - mediatek,mt8192-msdc_top > + - const: syscon > + > + reg: > + maxItems: 1 > + > + '#clock-cells': > + const: 1 > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + msdc: syscon@11f60000 { > + compatible = "mediatek,mt8192-msdc", "syscon"; > + reg = <0x11f60000 0x1000>; > + #clock-cells = <1>; > + }; > + > + - | > + msdc_top: syscon@11f10000 { > + compatible = "mediatek,mt8192-msdc_top", "syscon"; > + reg = <0x11f10000 0x1000>; > + #clock-cells = <1>; > + }; > -- > 2.18.0