From: Chunyan Zhang <zhang.lyra@gmail.com>
To: Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
Baolin Wang <baolin.wang7@gmail.com>,
Orson Zhai <orsonzhai@gmail.com>,
Chunyan Zhang <zhang.lyra@gmail.com>,
Chunyan Zhang <chunyan.zhang@unisoc.com>,
LKML <linux-kernel@vger.kernel.org>
Subject: [PATCH v3 1/4] dt-bindings: clk: sprd: Add bindings for ums512 clock controller
Date: Sat, 18 Sep 2021 12:51:11 +0800 [thread overview]
Message-ID: <20210918045114.387005-2-zhang.lyra@gmail.com> (raw)
In-Reply-To: <20210918045114.387005-1-zhang.lyra@gmail.com>
From: Chunyan Zhang <chunyan.zhang@unisoc.com>
Add a new bindings to describe ums512 clock compatible strings.
Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
---
.../bindings/clock/sprd,ums512-clk.yaml | 88 +++++++++++++++++++
1 file changed, 88 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml
diff --git a/Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml b/Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml
new file mode 100644
index 000000000000..4431767c84bc
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/sprd,ums512-clk.yaml
@@ -0,0 +1,88 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright 2019-2021 Unisoc Inc.
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/clock/sprd,ums512-clk.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: UMS512 Clock Control Unit Device Tree Bindings
+
+maintainers:
+ - Orson Zhai <orsonzhai@gmail.com>
+ - Baolin Wang <baolin.wang7@gmail.com>
+ - Chunyan Zhang <zhang.lyra@gmail.com>
+
+properties:
+ "#clock-cells":
+ const: 1
+
+ compatible:
+ enum:
+ - sprd,ums512-apahb-gate
+ - sprd,ums512-ap-clk
+ - sprd,ums512-aonapb-clk
+ - sprd,ums512-pmu-gate
+ - sprd,ums512-g0-pll
+ - sprd,ums512-g2-pll
+ - sprd,ums512-g3-pll
+ - sprd,ums512-gc-pll
+ - sprd,ums512-aon-gate
+ - sprd,ums512-audcpapb-gate
+ - sprd,ums512-audcpahb-gate
+ - sprd,ums512-gpu-clk
+ - sprd,ums512-mm-clk
+ - sprd,ums512-mm-gate-clk
+ - sprd,ums512-apapb-gate
+
+ clocks:
+ minItems: 1
+ maxItems: 4
+ description: |
+ The input parent clock(s) phandle for this clock, only list fixed
+ clocks which are declared in devicetree.
+
+ clock-names:
+ minItems: 1
+ maxItems: 4
+ items:
+ - const: ext-26m
+ - const: ext-32k
+ - const: ext-4m
+ - const: rco-100m
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - '#clock-cells'
+
+if:
+ properties:
+ compatible:
+ enum:
+ - sprd,ums512-ap-clk
+ - sprd,ums512-aonapb-clk
+ - sprd,ums512-mm-clk
+then:
+ required:
+ - reg
+
+else:
+ description: |
+ Other UMS512 clock nodes should be the child of a syscon node in
+ which compatible string should be:
+ "sprd,ums512-glbregs", "syscon", "simple-mfd"
+
+additionalProperties: false
+
+examples:
+ - |
+ ap_clk: clock-controller@20200000 {
+ compatible = "sprd,ums512-ap-clk";
+ reg = <0x20200000 0x1000>;
+ clocks = <&ext_26m>;
+ clock-names = "ext-26m";
+ #clock-cells = <1>;
+ };
+...
--
2.25.1
next prev parent reply other threads:[~2021-09-18 4:51 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-18 4:51 [PATCH v3 0/4] Add Unisoc's UMS512 clock support Chunyan Zhang
2021-09-18 4:51 ` Chunyan Zhang [this message]
2021-09-18 4:51 ` [PATCH v3 2/4] dt-bindings: mfd: sprd: Add bindings for ums512 global registers Chunyan Zhang
2021-09-22 20:37 ` Rob Herring
2021-10-06 7:59 ` Lee Jones
2021-09-18 4:51 ` [PATCH v3 3/4] clk: sprd: Add dt-bindings include file for UMS512 Chunyan Zhang
2021-09-22 20:38 ` Rob Herring
2021-09-18 4:51 ` [PATCH v3 4/4] clk: sprd: Add Unisoc's UMS512 clock driver Chunyan Zhang
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