From: Biju Das <biju.das.jz@bp.renesas.com>
To: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Vinod Koul <vkoul@kernel.org>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org,
Chris Paterson <Chris.Paterson2@renesas.com>,
Biju Das <biju.das@bp.renesas.com>
Subject: [PATCH 2/2] clk: renesas: rzg2l: Fix clk status function
Date: Wed, 22 Sep 2021 08:38:34 +0100 [thread overview]
Message-ID: <20210922073834.21304-2-biju.das.jz@bp.renesas.com> (raw)
In-Reply-To: <20210922073834.21304-1-biju.das.jz@bp.renesas.com>
As per RZ/G2L HW(Rev.0.50) manual, clock monitor register value
0 means clock is not supplied and 1 means clock is supplied.
This patch fixes the issue by removing the inverted logic.
Fixing the above, triggered following 2 issues
1) GIC interrupts don't work if we disable IA55_CLK and DMAC_ACLK.
Fixed this issue by adding these clocks as critical clocks.
2) DMA is not working, since the DMA driver is not turning on DMAC_PCLK.
So will provide a fix in the DMA driver to turn on DMA_PCLK.
Fixes: ef3c613ccd68 ("clk: renesas: Add CPG core wrapper for RZ/G2L SoC")
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
drivers/clk/renesas/rzg2l-cpg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index 3b3b2c3347f3..3e32a858b852 100644
--- a/drivers/clk/renesas/rzg2l-cpg.c
+++ b/drivers/clk/renesas/rzg2l-cpg.c
@@ -391,7 +391,7 @@ static int rzg2l_mod_clock_is_enabled(struct clk_hw *hw)
value = readl(priv->base + CLK_MON_R(clock->off));
- return !(value & bitmask);
+ return (value & bitmask);
}
static const struct clk_ops rzg2l_mod_clock_ops = {
--
2.17.1
next prev parent reply other threads:[~2021-09-22 7:50 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-22 7:38 [PATCH 1/2] clk: renesas: r9a07g044: Add IA55_CLK and DMAC_ACLK Biju Das
2021-09-22 7:38 ` Biju Das [this message]
2021-09-22 9:10 ` [PATCH 2/2] clk: renesas: rzg2l: Fix clk status function Sergei Shtylyov
2021-09-22 11:18 ` Biju Das
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