From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.1 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1B72C47409 for ; Mon, 6 Jan 2020 05:25:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C876E215A4 for ; Mon, 6 Jan 2020 05:25:20 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="key not found in DNS" (0-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="bW9YONBi" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725887AbgAFFZU (ORCPT ); Mon, 6 Jan 2020 00:25:20 -0500 Received: from mail25.static.mailgun.info ([104.130.122.25]:24927 "EHLO mail25.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725996AbgAFFZT (ORCPT ); Mon, 6 Jan 2020 00:25:19 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1578288318; h=Content-Transfer-Encoding: Content-Type: In-Reply-To: MIME-Version: Date: Message-ID: From: References: Cc: To: Subject: Sender; bh=mze9oFHUpNa6Z+8qwqijLBz6OSr9etD6jEGkkwSvmwE=; b=bW9YONBieSoHE+oC2blkqEGJliA8He0uFYkavc4z8iaoeoagQa+/S7qF8ioBVlVyP/M/LRP9 nPhZcKVbNhTRlwUzwqbVz0/XT/dVN+QevUztkAsi+cAtNPEPotrj2YUsXc9vIg9ra+MoCTh6 OC6KKXfwuF8uIxFQM8gc4E5Y2QQ= X-Mailgun-Sending-Ip: 104.130.122.25 X-Mailgun-Sid: WyI4MzlhZiIsICJsaW51eC1jbGtAdmdlci5rZXJuZWwub3JnIiwgImJlOWU0YSJd Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by mxa.mailgun.org with ESMTP id 5e12c4ba.7fdadccfca08-smtp-out-n02; Mon, 06 Jan 2020 05:25:14 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 5EE42C433A2; Mon, 6 Jan 2020 05:25:13 +0000 (UTC) Received: from [10.201.2.161] (blr-c-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sricharan) by smtp.codeaurora.org (Postfix) with ESMTPSA id 9B91DC433CB; Mon, 6 Jan 2020 05:25:03 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 9B91DC433CB Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=sricharan@codeaurora.org Subject: Re: [PATCH V3 1/5] dt-bindings: pinctrl: qcom: Add ipq6018 pinctrl bindings To: Rob Herring Cc: devicetree@vger.kernel.org, sboyd@kernel.org, linux-arm-msm@vger.kernel.org, linus.walleij@linaro.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, agross@kernel.org, sivaprak@codeaurora.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <1578052177-6778-1-git-send-email-sricharan@codeaurora.org> <1578052177-6778-2-git-send-email-sricharan@codeaurora.org> <20200104005834.GA22707@bogus> From: Sricharan R Message-ID: <3a98d701-3400-dc46-167c-214a68ff9c04@codeaurora.org> Date: Mon, 6 Jan 2020 10:55:01 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.3.1 MIME-Version: 1.0 In-Reply-To: <20200104005834.GA22707@bogus> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Hi Rob, Thanks for the review. On 1/4/2020 6:28 AM, Rob Herring wrote: > On Fri, Jan 03, 2020 at 05:19:33PM +0530, Sricharan R wrote: >> Add device tree binding Documentation details for ipq6018 >> pinctrl driver. >> >> Co-developed-by: Rajkumar Ayyasamy >> Signed-off-by: Rajkumar Ayyasamy >> Co-developed-by: Selvam Sathappan Periakaruppan >> Signed-off-by: Selvam Sathappan Periakaruppan >> Co-developed-by: Sivaprakash Murugesan >> Signed-off-by: Sivaprakash Murugesan >> Signed-off-by: Sricharan R >> --- >> [v3] Fixed the example dt node, inherited properties >> >> .../bindings/pinctrl/qcom,ipq6018-pinctrl.yaml | 166 +++++++++++++++++++++ >> 1 file changed, 166 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml >> >> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml >> new file mode 100644 >> index 0000000..e959c5f >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml >> @@ -0,0 +1,166 @@ >> +# SPDX-License-Identifier: GPL-2.0-or-later >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/pinctrl/qcom,ipq6018-pinctrl.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Qualcomm Technologies, Inc. IPQ6018 TLMM block >> + >> +maintainers: >> + - Sricharan R >> + >> +description: | >> + This binding describes the Top Level Mode Multiplexer block found in the >> + IPQ6018 platform. >> + >> +properties: >> + compatible: >> + const: qcom,ipq6018-pinctrl > > A blank line after each property schema is preferred. ok. > >> + reg: >> + maxItems: 1 >> + interrupts: >> + Description: Specifies the TLMM summary IRQ >> + maxItems: 1 >> + interrupt-controller: true >> + '#interrupt-cells': >> + Description: >> + Specifies the PIN numbers and Flags, as defined in defined in >> + include/dt-bindings/interrupt-controller/irq.h >> + const: 2 >> + gpio-controller: true >> + '#gpio-cells': >> + Description: Specifying the pin number and flags, as defined in >> + include/dt-bindings/gpio/gpio.h >> + const: 2 >> + gpio-ranges: >> + Description: Documentation/devicetree/bindings/gpio/gpio.txt >> + maxItems: 1 >> + >> +#PIN CONFIGURATION NODES >> +patternProperties: >> + '-pins$': >> + type: object >> + Description: >> + Pinctrl node's client devices use subnodes for desired pin configuration. >> + Client device subnodes use below standard properties. >> + >> + Properties: > > Did you run 'make dt_binding_check' and is dt-schema up to date? This > isn't valid json-schema which is case sensitive. ok, will run the checks and will fix it. > >> + pins: >> + allOf: >> + $ref: /schemas/types.yaml#/definitions/string > > Also not valid as allOf is a list. > ok, will fix >> + enum: >> + gpio0-gpio80 > > As is 'enum'... ok. > >> + sdc1_clk >> + sdc1_cmd >> + sdc1_data >> + sdc2_clk >> + sdc2_cmd >> + sdc2_data >> + qdsd_cmd >> + qdsd_data0 >> + qdsd_data1 >> + qdsd_data2 >> + qdsd_data3 >> + Description: >> + List of gpio pins affected by the properties specified in this >> + subnode. >> + >> + function: >> + allOf: >> + $ref: /schemas/types.yaml#/definitions/string >> + enum: >> + adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1, atest_char, >> + atest_char0, atest_char1, atest_char2, atest_char3, atest_combodac, >> + atest_gpsadc0, atest_gpsadc1, atest_tsens, atest_wlan0, >> + atest_wlan1, backlight_en, bimc_dte0, bimc_dte1, blsp_i2c1, >> + blsp_i2c2, blsp_i2c3, blsp_i2c4, blsp_i2c5, blsp_i2c6, blsp_spi1, >> + blsp_spi1_cs1, blsp_spi1_cs2, blsp_spi1_cs3, blsp_spi2, >> + blsp_spi2_cs1, blsp_spi2_cs2, blsp_spi2_cs3, blsp_spi3, >> + blsp_spi3_cs1, blsp_spi3_cs2, blsp_spi3_cs3, blsp_spi4, blsp_spi5, >> + blsp_spi6, blsp_uart1, blsp_uart2, blsp_uim1, blsp_uim2, cam1_rst, >> + cam1_standby, cam_mclk0, cam_mclk1, cci_async, cci_i2c, cci_timer0, >> + cci_timer1, cci_timer2, cdc_pdm0, codec_mad, dbg_out, display_5v, >> + dmic0_clk, dmic0_data, dsi_rst, ebi0_wrcdc, euro_us, ext_lpass, >> + flash_strobe, gcc_gp1_clk_a, gcc_gp1_clk_b, gcc_gp2_clk_a, >> + gcc_gp2_clk_b, gcc_gp3_clk_a, gcc_gp3_clk_b, gpio, gsm0_tx0, >> + gsm0_tx1, gsm1_tx0, gsm1_tx1, gyro_accl, kpsns0, kpsns1, kpsns2, >> + ldo_en, ldo_update, mag_int, mdp_vsync, modem_tsync, m_voc, >> + nav_pps, nav_tsync, pa_indicator, pbs0, pbs1, pbs2, pri_mi2s, >> + pri_mi2s_ws, prng_rosc, pwr_crypto_enabled_a, pwr_crypto_enabled_b, >> + pwr_modem_enabled_a, pwr_modem_enabled_b, pwr_nav_enabled_a, >> + pwr_nav_enabled_b, qdss_ctitrig_in_a0, qdss_ctitrig_in_a1, >> + qdss_ctitrig_in_b0, qdss_ctitrig_in_b1, qdss_ctitrig_out_a0, >> + qdss_ctitrig_out_a1, qdss_ctitrig_out_b0, qdss_ctitrig_out_b1, >> + qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b, >> + qdss_tracedata_a, qdss_tracedata_b, reset_n, sd_card, sd_write, >> + sec_mi2s, smb_int, ssbi_wtr0, ssbi_wtr1, uim1, uim2, uim3, >> + uim_batt, wcss_bt, wcss_fm, wcss_wlan, webcam1_rst >> + Description: >> + Specify the alternative function to be configured for the specified >> + pins. >> + bias-disable: >> + allOf: >> + $ref: /schemas/pinctrl/pincfg-node.yaml > > While you should have this reference, it is at the wrong level. The node > needs to reference this schema, not the properties. > ok, will fix here and below properties as well. Regards, Sricharan >> + Description: >> + The specified pins should be configured as no pull. >> + bias-pull-down: >> + allOf: >> + $ref: /schemas/pinctrl/pincfg-node.yaml >> + Description: >> + The specified pins should be configured as pull down. >> + bias-pull-up: >> + allOf: >> + $ref: /schemas/pinctrl/pincfg-node.yaml >> + Description: >> + The specified pins should be configured as pull up. >> + output-high: >> + allOf: >> + $ref: /schemas/pinctrl/pincfg-node.yaml >> + Description: >> + The specified pins are configured in output mode, driven high. >> + This option is not available for sdc pins. >> + output-low: >> + allOf: >> + $ref: /schemas/pinctrl/pincfg-node.yaml >> + Description: >> + The specified pins are configured in output mode, driven low. >> + This option is not available for sdc pins. >> + drive-strength: >> + allOf: >> + $ref: /schemas/types.yaml#/definitions/uint32 >> + enum: [2, 4, 6, 8, 10, 12, 14, 16] >> + Description: >> + Selects the drive strength for the specified pins, in mA. >> + >> + required: >> + - pins >> + - function >> + >> +required: >> + - compatible >> + - reg >> + - interrupts >> + - interrupt-controller >> + - '#interrupt-cells' >> + - gpio-controller >> + - '#gpio-cells' >> + - gpio-ranges >> + >> +example: >> + tlmm: pinctrl@1000000 { >> + compatible = "qcom,ipq6018-pinctrl"; >> + reg = <0x01000000 0x300000>; >> + interrupts = ; >> + gpio-controller; >> + #gpio-cells = <2>; >> + gpio-ranges = <&tlmm 0 80>; >> + interrupt-controller; >> + #interrupt-cells = <2>; >> + >> + serial_3_pins: serial3-pinmux { >> + pins = "gpio44", "gpio45"; >> + function = "blsp2_uart"; >> + drive-strength = <8>; >> + bias-pull-down; >> + }; >> + }; >> -- >> 1.9.1 >> -- "QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation