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Mon, 3 Oct 2022 19:47:06 GMT Received: from [10.110.93.213] (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Mon, 3 Oct 2022 12:47:05 -0700 Message-ID: <55d28ebc-e061-7b5e-99f9-f34f2b0e9af8@quicinc.com> Date: Mon, 3 Oct 2022 14:47:04 -0500 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.2.2 Subject: Re: [PATCH 5/5] dt-bindings: clock: Introduce pdc bindings for QDU1000 and QRU1000 Content-Language: en-US To: Marc Zyngier CC: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Thomas Gleixner , , , , References: <20221001030403.27659-1-quic_molvera@quicinc.com> <20221001030403.27659-6-quic_molvera@quicinc.com> <114fb5a01a422c15997a9a4daebce584@kernel.org> From: Melody Olvera In-Reply-To: <114fb5a01a422c15997a9a4daebce584@kernel.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: gfLpfxwFtei-0YrZ2ypWrPHnRMXpaLfe X-Proofpoint-GUID: gfLpfxwFtei-0YrZ2ypWrPHnRMXpaLfe X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-10-03_02,2022-09-29_03,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 priorityscore=1501 phishscore=0 suspectscore=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 spamscore=0 mlxscore=0 mlxlogscore=944 adultscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2210030119 Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org On 10/1/2022 4:22 AM, Marc Zyngier wrote: > On 2022-10-01 04:04, Melody Olvera wrote: >> Add compatible fields for QDU1000 and QRU1000 pdcs. >> >> Signed-off-by: Melody Olvera >> --- >>  .../devicetree/bindings/interrupt-controller/qcom,pdc.yaml      | 2 ++ >>  1 file changed, 2 insertions(+) >> >> diff --git >> a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml >> b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml >> index b6f56cf5fbe3..5c7b790db7e0 100644 >> --- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml >> +++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml >> @@ -33,6 +33,8 @@ properties: >>            - qcom,sm8150-pdc >>            - qcom,sm8250-pdc >>            - qcom,sm8350-pdc >> +          - qcom,qdu1000-pdc >> +          - qcom,qru1000-pdc >>        - const: qcom,pdc >> >>    reg: > > Please fix the title of the commit, as this has little to do with clocks. Will do. > >         M. Thanks, Melody