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From: Zhou Yanjie <zhouyanjie@wanyeetech.com>
To: Paul Cercueil <paul@crapouillou.net>
Cc: linux-mips@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org,
	mark.rutland@arm.com, ralf@linux-mips.org, paulburton@kernel.org,
	jiaxun.yang@flygoat.com, chenhc@lemote.com, allison@lohutok.net,
	tglx@linutronix.de, daniel.lezcano@linaro.org,
	geert+renesas@glider.be, krzk@kernel.org, keescook@chromium.org,
	ebiederm@xmission.com, miquel.raynal@bootlin.com,
	paul@boddie.org.uk, hns@goldelico.com, sernia.zhou@foxmail.com,
	zhenwenjin@gmail.com, mips-creator-ci20-dev@googlegroups.com,
	1326991897@qq.com
Subject: Re: [PATCH v4 5/6] MIPS: CI20: Modify DTS to support high resolution timer for SMP.
Date: Sat, 15 Feb 2020 22:05:16 +0800
Message-ID: <5E47FA9C.504@wanyeetech.com> (raw)
In-Reply-To: <1581705458.3.2@crapouillou.net>

Hi Paul,

On 2020年02月15日 02:37, Paul Cercueil wrote:
> Hi Zhou,
>
> I think you can move this patch before the clocksource one - it will 
> work with the old clocksource code and in generally it's a good idea 
> to ensure (if possible) that you can git-bisect without ending up with 
> a broken kernel.

OK, I will do it in v5.

>
> -Paul
>
>
> Le sam., févr. 15, 2020 at 02:02, 周琰杰 (Zhou Yanjie) 
> <zhouyanjie@wanyeetech.com> a écrit :
>> Modify DTS, change tcu channel from 2 to 3, channel #0 and #1 for
>> per core local timer, #2 for clocksource.
>>
>> Tested-by: H. Nikolaus Schaller <hns@goldelico.com>
>> Tested-by: Paul Boddie <paul@boddie.org.uk>
>> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
>> ---
>>
>> Notes:
>>     v1->v2:
>>     No change.
>>
>>     v2->v3:
>>     No change.
>>
>>     v3->v4:
>>     Rebase on top of kernel 5.6-rc1.
>>
>>  arch/mips/boot/dts/ingenic/ci20.dts | 11 +++++++++--
>>  1 file changed, 9 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/mips/boot/dts/ingenic/ci20.dts 
>> b/arch/mips/boot/dts/ingenic/ci20.dts
>> index 37b9316..98c4c42 100644
>> --- a/arch/mips/boot/dts/ingenic/ci20.dts
>> +++ b/arch/mips/boot/dts/ingenic/ci20.dts
>> @@ -456,6 +456,13 @@
>>
>>  &tcu {
>>      /* 3 MHz for the system timer and clocksource */
>> -    assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>;
>> -    assigned-clock-rates = <3000000>, <3000000>;
>> +    assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
>> +                      <&tcu TCU_CLK_TIMER2>;
>> +    assigned-clock-rates = <3000000>, <3000000>, <750000>;
>> +
>> +    /*
>> +     * Use channel #0 and #1 for the per core system timer,
>> +     * and use channel #2 for the clocksource.
>> +     */
>> +    ingenic,pwm-channels-mask = <0xF8>;
>>  };
>> -- 
>> 2.7.4
>>
>


  reply index

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-14 18:02 Introduce SMP support for CI20 (based on JZ4780) v4 周琰杰 (Zhou Yanjie)
2020-02-14 18:02 ` [PATCH v4 0/6] Introduce SMP support for JZ4780 周琰杰 (Zhou Yanjie)
2020-02-14 18:02 ` [PATCH v4 1/6] MIPS: JZ4780: Introduce SMP support 周琰杰 (Zhou Yanjie)
2020-02-14 18:21   ` Paul Cercueil
2020-02-15 14:03     ` Zhou Yanjie
2020-02-15 15:03   ` afzal mohammed
2020-02-15 16:17     ` Zhou Yanjie
2020-02-14 18:02 ` [PATCH v4 2/6] clocksource: Ingenic: Add high resolution timer support for SMP 周琰杰 (Zhou Yanjie)
2020-02-14 18:31   ` Paul Cercueil
2020-02-15 14:04     ` Zhou Yanjie
2020-02-14 18:02 ` [PATCH v4 3/6] dt-bindings: MIPS: Document Ingenic SoCs binding 周琰杰 (Zhou Yanjie)
2020-02-14 18:02 ` [PATCH v4 4/6] MIPS: Ingenic: Add 'cpus' node for Ingenic SoCs 周琰杰 (Zhou Yanjie)
2020-02-14 18:02 ` [PATCH v4 5/6] MIPS: CI20: Modify DTS to support high resolution timer for SMP 周琰杰 (Zhou Yanjie)
2020-02-14 18:37   ` Paul Cercueil
2020-02-15 14:05     ` Zhou Yanjie [this message]
2020-02-14 18:02 ` [PATCH v4 6/6] MIPS: CI20: Update defconfig to support SMP 周琰杰 (Zhou Yanjie)

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