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From: Alexander Dahl <ada@thorsis.com>
To: linux-clk@vger.kernel.org
Cc: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Stephen Boyd" <sboyd@kernel.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	kernel@pengutronix.de
Subject: Re: [PATCH] dt-bindings: clk: Make example a bit clearer
Date: Fri, 16 Aug 2019 10:53:48 +0200
Message-ID: <87001375.oQs5gUaWZR@ada> (raw)
In-Reply-To: <20190815095059.ljqznve6pvqqfl57@pengutronix.de>

Hello Uwe,

Am Donnerstag, 15. August 2019, 11:50:59 CEST schrieb Uwe Kleine-König:
> Maybe pick <&pll 3> instead of <&pll 1> in my patch and merge the two
> changes? Or drop clocks and clock-names from the example because
> otherwise unrelated clocks are modified which shouldn't be done. The
> result is below.

I like that result below with the dots for the 'clock' properties and the 
additional explanations. Can we resend that as new patch?

Greets
Alex

> ---->8----
> From: =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= <u.kleine-koenig@pengutronix.de>
> Date: Thu, 15 Aug 2019 11:48:25 +0200
> Subject: [PATCH] dt-bindings: clk: Make example a bit clearer
> MIME-Version: 1.0
> Content-Type: text/plain; charset=UTF-8
> Content-Transfer-Encoding: 8bit
> 
> Previously the example used <&pll 2> in two places which made it harder
> than necessary to understand why this clock gets the parent of
> <&clkcon 0>. Also describe why <&pll 2> isn't reparented and <&clkcon 0>
> gets no rate assigned.
> 
> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
> ---
>  .../devicetree/bindings/clock/clock-bindings.txt     | 12 +++++++-----
>  1 file changed, 7 insertions(+), 5 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/clock/clock-bindings.txt
> b/Documentation/devicetree/bindings/clock/clock-bindings.txt index
> b646bbcf7f92..1d4942380918 100644
> --- a/Documentation/devicetree/bindings/clock/clock-bindings.txt
> +++ b/Documentation/devicetree/bindings/clock/clock-bindings.txt
> @@ -150,16 +150,18 @@ set to 0, or can be omitted if it is not followed by
> any non-zero entry. compatible = "fsl,imx-uart";
>          reg = <0xa000 0x1000>;
>          ...
> -        clocks = <&osc 0>, <&pll 1>;
> -        clock-names = "baud", "register";
> +        clocks = ...
> +        clock-names = ...
> 
>          assigned-clocks = <&clkcon 0>, <&pll 2>;
> -        assigned-clock-parents = <&pll 2>;
> +        assigned-clock-parents = <&pll 1>;
>          assigned-clock-rates = <0>, <460800>;
>      };
> 
> -In this example the <&pll 2> clock is set as parent of clock <&clkcon 0>
> and -the <&pll 2> clock is assigned a frequency value of 460800 Hz.
> +In this example the <&pll 1> clock is set as parent of clock <&clkcon 0>
> and +the <&pll 2> clock is assigned a frequency value of 460800 Hz.  A
> parent +setting for <&pll 2> is omitted (end of list) and rate setting for
> <&clkcon 0> +is skipped because set to <0>.
> 
>  Configuring a clock's parent and rate through the device node that consumes
> the clock can be done only for clocks that have a single user. Specifying



      reply index

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-15  7:46 Uwe Kleine-König
2019-08-15  8:37 ` Alexander Dahl
2019-08-15  9:50   ` Uwe Kleine-König
2019-08-16  8:53     ` Alexander Dahl [this message]

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