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From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: Dmitry Osipenko <digetx@gmail.com>, Mark Brown <broonie@kernel.org>
Cc: <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
	<lgirdwood@gmail.com>, <perex@perex.cz>, <tiwai@suse.com>,
	<mperttunen@nvidia.com>, <gregkh@linuxfoundation.org>,
	<sboyd@kernel.org>, <robh+dt@kernel.org>, <mark.rutland@arm.com>,
	<pdeschrijver@nvidia.com>, <pgaikwad@nvidia.com>,
	<spujar@nvidia.com>, <josephl@nvidia.com>,
	<daniel.lezcano@linaro.org>, <mmaddireddy@nvidia.com>,
	<markz@nvidia.com>, <devicetree@vger.kernel.org>,
	<linux-clk@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v5 12/19] ASoC: tegra: Add initial parent configuration for audio mclk
Date: Sat, 4 Jan 2020 21:03:28 -0800
Message-ID: <9e08a1eb-7a9f-0ed0-a2f4-08f1d6f93958@nvidia.com> (raw)
In-Reply-To: <0f956c12-98cf-3466-f3ee-ffc3a23e3e3d@gmail.com>


On 1/4/20 5:05 PM, Dmitry Osipenko wrote:
> 04.01.2020 08:49, Sowjanya Komatineni пишет:
>> On 1/2/20 8:12 AM, Dmitry Osipenko wrote:
>>> 02.01.2020 10:03, Sowjanya Komatineni пишет:
>>>> On 12/27/19 1:19 PM, Sowjanya Komatineni wrote:
>>>>> On 12/27/19 6:56 AM, Dmitry Osipenko wrote:
>>>>>> 25.12.2019 20:57, Mark Brown пишет:
>>>>>>> On Mon, Dec 23, 2019 at 12:14:34AM +0300, Dmitry Osipenko wrote:
>>>>>>>> 21.12.2019 01:26, Sowjanya Komatineni пишет:
>>>>>>>>> Tegra PMC clock clk_out_1 is dedicated for audio mclk from Tegra30
>>>>>>>>> through Tegra210 and currently Tegra clock driver does initial parent
>>>>>>>>> configuration for audio mclk "clk_out_1" and enables them by default.
>>>>>>> Please delete unneeded context from mails when replying.  Doing this
>>>>>>> makes it much easier to find your reply in the message, helping ensure
>>>>>>> it won't be missed by people scrolling through the irrelevant quoted
>>>>>>> material.
>>>>>> Ok
>>>>>>
>>>>>>>>> -    clk_disable_unprepare(data->clk_cdev1);
>>>>>>>>> -    clk_disable_unprepare(data->clk_pll_a_out0);
>>>>>>>>> -    clk_disable_unprepare(data->clk_pll_a);
>>>>>>>>> +    if (__clk_is_enabled(data->clk_cdev1))
>>>>>>>>> +        clk_disable_unprepare(data->clk_cdev1);
>>>>>>>> The root of the problem is that you removed clocks enabling from
>>>>>>>> tegra_asoc_utils_init().
>>>>> currently, audio mclk and its parent clocks enabling are from clock
>>>>> driver init and not from tegra_asoc_utils_init.
>>>>>>>> I'm not sure why clocks should be disabled during the rate-changing,
>>>>>>>> probably this action is not really needed.
>>>>>>> I know nothing about this particular device but this is not that
>>>>>>> unusual a restriction for audio hardware, you often can't
>>>>>>> robustly reconfigure the clocking for a device while it's active
>>>>>>> due to issues in the hardware.  You often see issues with FIFOs
>>>>>>> glitching or state machines getting stuck.  This may not be an
>>>>>>> issue here but if it's something that's documented as a
>>>>>>> requirement it's probably good to pay attention.
>>>>>> I don't know details about that hardware either, maybe it is simply not
>>>>>> safe to change PLL_A rate dynamically and then CLK_SET_RATE_GATE could
>>>>>> be used.
>>>>>>
>>>>>> If nobody knows for sure, then will be better to keep
>>>>>> tegra_asoc_utils_set_rate() unchanged.
>>>>> plla rate change through tegra_asoc_utils_set_rate() happens only when
>>>>> there is not active playback or record corresponding to this sound
>>>>> device.
>>>>>
>>>>> So, I don't see reason for disabling clock during rate change and not
>>>>> sure why we had this from the beginning.
>>>>>
>>>>> Thierry/Sameer,
>>>>>
>>>>> Can you please comment?
>>>>>
>>>>> Yes, we can use CLK_SET_RATE_GATE for PLLA and remove clock disabling
>>>>> before rate change.
>>>>>
>>>> PLLA is used for both I2S controller clock and also for audio mclk. I2S
>>>> driver suspend resume implementations takes care of enabling and
>>>> disabling I2S clock but audio mclk will be enabled during that time and
>>>> PLLA disable might not happen. So using CLK_SET_RATE_GATE prevents rate
>>>> change to happen and as rate change happens only when there is no active
>>>> audio record/playback, we can perform rate change without disable/enable
>>>> during rate change.
>>>>
>>>> So probably below changes should be good.
>>>>
>>>>    * remove asoc_utils_set_rate call from asoc_utils_init as set_rate
>>>>      happens during existing hw_params callback implementations in sound
>>>>      drivers and there is no need to do rate change during asoc_utils_init.
>>>>    * remove disable/enable clocks during rate change in asoc_utils_set_rate.
>>>>    * add startup and shutdown snd_soc_ops callbacks to do enable and
>>>>      disable audio mclk.
>>>>
>>> Sounds good, thanks. I'll be happy to review and test it.
>> Regarding disabling audio mclk during PLLA rate change, no need to
>> explicitly disable PLLA on asoc utils as clock driver takes care of it
>> properly during pll rate change.
>>
>> But the downstream clock divider hardware can malfunction without
>> recovery when subject to unstable PLL output during locking, unless
>> clock is gated.
>>
>> So it is recommended to disable downstream clocks during PLL rate change.
>>
>> PLLA downstream clocks are I2S and audio mclk (cdev1/clk1 and extern1
>> clocks) and I2S clock is disabled in I2S driver by PM runtime ops.
> The I2S driver uses asynchronous pm_runtime_put() and thus there is no
> guarantee that I2S clock is disabled at the time of changing PLLA rate.
> Could this be a problem?
Looking into soc_pcm_hw_params, I see dai_link hw_params ops happens 
prior to  platform snd_soc_dai_driver hw_params ops.

So, PLL rate change thru asoc_utils_set_rate happens during sample rate 
config of dai_link hw_params ops and during this time I2S will always be 
in idle state.

Sameer, Please confirm.

>> For audio mclk, need to make sure mclk are disabled during rate change.
>>
>> So below are the changes to audio clocks that will be in next version.
>>
>>    * remove tegra_asoc_utils_set_rate call from tegra_asoc_utils_init as
>>      tegra_asoc_utils_set_rate happens during hw_params callback.
>>    * add shutdown snd_soc_ops callbacks to disable of audio mclk.
>>    * remove disable audio mclk (cdev1) and plla clocks prior to rate
>>      change in tegra_asoc_utils_set_rate (as audio mclk will always be in
>>      disabled state every time hw_param callback gets executed) and keep
>>      audio mclk enable after the rate change in tegra_asoc_utils_set_rate.
>>

  reply index

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-20 22:26 [PATCH v5 00/19] Move PMC clocks into Tegra PMC driver Sowjanya Komatineni
2019-12-20 22:26 ` [PATCH v5 01/19] dt-bindings: clock: tegra: Change CLK_M_DIV to OSC_DIV clocks Sowjanya Komatineni
2019-12-20 22:26 ` [PATCH v5 02/19] clk: tegra: Change CLK_M_DIV clocks " Sowjanya Komatineni
2019-12-20 22:26 ` [PATCH v5 03/19] clk: tegra: Fix Tegra PMC clock out parents Sowjanya Komatineni
2019-12-20 22:26 ` [PATCH v5 04/19] dt-bindings: tegra: Convert Tegra PMC bindings to YAML Sowjanya Komatineni
2019-12-26 23:23   ` Rob Herring
2019-12-20 22:26 ` [PATCH v5 05/19] dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings Sowjanya Komatineni
2019-12-26 23:24   ` Rob Herring
2019-12-20 22:26 ` [PATCH v5 06/19] soc: tegra: Add Tegra PMC clocks registration into PMC driver Sowjanya Komatineni
2019-12-20 22:26 ` [PATCH v5 07/19] dt-bindings: soc: tegra-pmc: Add id for Tegra PMC 32KHz blink clock Sowjanya Komatineni
2019-12-22 21:55   ` Dmitry Osipenko
2019-12-27 21:30     ` Sowjanya Komatineni
2019-12-30 19:39       ` Dmitry Osipenko
2019-12-26 18:17   ` Rob Herring
2019-12-27 21:35     ` Sowjanya Komatineni
2019-12-20 22:26 ` [PATCH v5 08/19] soc: tegra: Add support for " Sowjanya Komatineni
2019-12-20 22:26 ` [PATCH v5 09/19] clk: tegra: Remove tegra_pmc_clk_init along with clk ids Sowjanya Komatineni
2019-12-20 22:26 ` [PATCH v5 10/19] dt-bindings: clock: tegra: Remove pmc clock ids from clock dt-bindings Sowjanya Komatineni
2019-12-20 22:26 ` [PATCH v5 11/19] ASoC: tegra: Use device managed resource APIs to get the clock Sowjanya Komatineni
2019-12-22 21:14   ` Dmitry Osipenko
2019-12-20 22:26 ` [PATCH v5 12/19] ASoC: tegra: Add initial parent configuration for audio mclk Sowjanya Komatineni
2019-12-22 21:14   ` Dmitry Osipenko
2019-12-22 21:18     ` Dmitry Osipenko
2019-12-27 21:25       ` Sowjanya Komatineni
2019-12-28 14:28         ` Dmitry Osipenko
2019-12-25 17:57     ` Mark Brown
2019-12-27 14:56       ` Dmitry Osipenko
2019-12-27 21:19         ` Sowjanya Komatineni
     [not found]           ` <b6ec6cfd-d883-ea28-00f8-884fa80cfee1@nvidia.com>
2020-01-02 16:12             ` Dmitry Osipenko
     [not found]               ` <fb252096-e101-7d21-9717-c23607ae6edd@nvidia.com>
2020-01-05  1:05                 ` Dmitry Osipenko
2020-01-05  5:03                   ` Sowjanya Komatineni [this message]
2020-01-06  4:21                     ` Sameer Pujar
2020-01-06 16:09                       ` Sowjanya Komatineni
     [not found]                         ` <33eb0b3e-5605-3dfd-a6ea-a50ae1348c86@nvidia.com>
2020-01-06 22:59                           ` Dmitry Osipenko
2019-12-27 22:48         ` Mark Brown
2019-12-20 22:26 ` [PATCH v5 13/19] ASoC: tegra: Add fallback implementation " Sowjanya Komatineni
2019-12-20 22:27 ` [PATCH v5 14/19] clk: tegra: Remove audio related clock enables from init_table Sowjanya Komatineni
2019-12-20 22:27 ` [PATCH v5 15/19] ARM: dts: tegra: Add clock-cells property to pmc Sowjanya Komatineni
2019-12-20 22:27 ` [PATCH v5 16/19] arm64: tegra: Add clock-cells property to Tegra PMC node Sowjanya Komatineni
2019-12-20 22:27 ` [PATCH v5 17/19] ARM: tegra: Update sound node clocks in device tree Sowjanya Komatineni
2019-12-20 22:27 ` [PATCH v5 18/19] arm64: tegra: smaug: Change clk_out_2 provider to pmc Sowjanya Komatineni
2019-12-22 22:00   ` Dmitry Osipenko
2019-12-27 21:32     ` Sowjanya Komatineni
2019-12-20 22:27 ` [PATCH v5 19/19] ASoC: nau8825: change Tegra clk_out_2 provider from tegra_car " Sowjanya Komatineni

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