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 messages from 2019-11-08 22:16:54 to 2019-11-13 22:19:54 UTC [more...]

[PATCH 0/5] Add clocks for Unisoc's SC9863A
 2019-11-13 22:19 UTC  (5+ messages)
` [PATCH 1/5] clk: sprd: add gate for pll clocks
` [PATCH 5/5] clk: sprd: add clocks support for SC9863A

[PATCH -next] clk: armada-xp: remove unused code
 2019-11-13 21:40 UTC  (2+ messages)

[GIT PULL] Rockchip clock updates for 5.4
 2019-11-13 20:48 UTC  (2+ messages)

[GIT PULL v2 1/2] clk: Changes for v5.5-rc1
 2019-11-13 19:27 UTC  (4+ messages)
` [GIT PULL v2 2/2] clk: tegra: "

[PATCH v1] clk: tegra: clk-dfll: Fix to remove pm_runtime_irq_safe
 2019-11-13 16:22 UTC  (4+ messages)

[PATCH] clk: ti: dra7: fix parent for gmac_clkctrl
 2019-11-13 15:40 UTC  (6+ messages)

[PATCH v9 0/4] MSM8998 Multimedia Clock Controller
 2019-11-13 15:02 UTC  (7+ messages)
` [PATCH v9 1/4] dt-bindings: clock: Document external clocks for MSM8998 gcc
` [PATCH v9 2/4] dt-bindings: clock: Convert qcom,mmcc to DT schema
` [PATCH v9 3/4] dt-bindings: clock: Add support for the MSM8998 mmcc
` [PATCH v9 4/4] clk: qcom: Add MSM8998 Multimedia Clock Controller (MMCC) driver

[PATCH v2 0/3] add Amlogic A1 clock controller driver
 2019-11-13 14:21 UTC  (8+ messages)
` [PATCH v2 3/3] clk: meson: a1: add support for Amlogic A1 clock driver

[PATCH v5 0/5] PM / devfreq: Add dynamic scaling for imx8m ddr controller
 2019-11-13 14:07 UTC  (15+ messages)
` [PATCH v5 1/5] clk: imx8m: Set CLK_GET_RATE_NOCACHE on dram clocks
` [PATCH v5 2/5] clk: imx: Mark dram pll on 8mm and 8mn with CLK_GET_RATE_NOCACHE
` [PATCH v5 3/5] dt-bindings: memory: Add bindings for imx8m ddr controller
` [PATCH v5 4/5] PM / devfreq: Add dynamic scaling "
  ` [RFC PATCH] PM / devfreq: clk_get_parent_by_index() can be static
` [PATCH v5 5/5] arm64: dts: imx8m: Add ddr controller nodes

[PATCH v2 00/17] NVIDIA Tegra20 CPUFreq driver major update
 2019-11-13 13:57 UTC  (4+ messages)
` [PATCH v2 17/17] ARM: dts: tegra30: cardhu-a04: Add CPU Operating Performance Points

[PATCH 0/2] clk: imx: pll14xx: io relaxed fix
 2019-11-13 12:35 UTC  (6+ messages)
` [PATCH 1/2] clk: imx: pll14xx: use writel_relaxed
` [PATCH 2/2] clk: imx: pll14xx: use readl to force write completed

[PATCH 1/3] dt-bindings: imx8-clock: Add ADMA clock ids
 2019-11-13 12:25 UTC  (3+ messages)
` [PATCH 2/3] clk: imx8qxp: Add ADMA clocks
` [PATCH 3/3] clk: imx8qxp: Add ACM driver

[PATCH] clk: imx: pll14xx: introduce imx_clk_hw_pll14xx_flags
 2019-11-13 12:19 UTC  (3+ messages)

[PATCH 1/2] clk: imx: sccg: use relaxed io api
 2019-11-13 10:02 UTC  (2+ messages)
` [PATCH 2/2] clk: imx: composite-8m: "

[PATCH AUTOSEL 4.9 35/68] clk: samsung: Use clk_hw API for calling clk framework from clk notifiers
 2019-11-13  1:58 UTC 

[PATCH AUTOSEL 4.14 026/115] clk: keystone: Enable TISCI clocks if K3_ARCH
 2019-11-13  1:55 UTC  (3+ messages)
` [PATCH AUTOSEL 4.14 063/115] clk: samsung: exynos5420: Define CLK_SECKEY gate clock only or Exynos5420
` [PATCH AUTOSEL 4.14 064/115] clk: samsung: Use clk_hw API for calling clk framework from clk notifiers

[PATCH AUTOSEL 4.19 049/209] clk: keystone: Enable TISCI clocks if K3_ARCH
 2019-11-13  1:48 UTC  (4+ messages)
` [PATCH AUTOSEL 4.19 106/209] clk: samsung: Use NOIRQ stage for Exynos5433 clocks suspend/resume
` [PATCH AUTOSEL 4.19 107/209] clk: samsung: exynos5420: Define CLK_SECKEY gate clock only or Exynos5420
` [PATCH AUTOSEL 4.19 108/209] clk: samsung: Use clk_hw API for calling clk framework from clk notifiers

[PATCH v4 0/6] PM / devfreq: Add dynamic scaling for imx8m ddr controller
 2019-11-13  1:43 UTC  (18+ messages)
` [PATCH v4 1/6] clk: imx8m: Set CLK_GET_RATE_NOCACHE on dram clocks
` [PATCH v4 2/6] clk: imx: Mark dram pll on 8mm and 8mn with CLK_GET_RATE_NOCACHE
` [PATCH v4 3/6] dt-bindings: memory: Add bindings for imx8m ddr controller
` [PATCH v4 4/6] PM / devfreq: Add dynamic scaling "
` [PATCH v4 5/6] PM / devfreq: imx8m-ddrc: Measure bandwidth with perf
` [PATCH v4 6/6] arm64: dts: imx8m: Add ddr controller nodes

[PATCH 0/7] clk: zynqmp: Extend and fix zynqmp clock driver
 2019-11-12 22:51 UTC  (9+ messages)
` [PATCH 1/7] dt-bindings: clock: Add bindings for versal "
` [PATCH 2/7] clk: zynqmp: Extend driver for versal
` [PATCH 3/7] clk: zynqmp: Warn user if clock user are more than allowed
` [PATCH 4/7] clk: zynqmp: Add support for get max divider
` [PATCH 5/7] clk: zynqmp: Fix divider calculation
` [PATCH 6/7] clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flag
` [PATCH 7/7] clk: zynqmp: Fix fractional clock check

[PATCH] clk: qcom: gcc-sm8150: Drop non-DT fallback parent names
 2019-11-12 22:48 UTC 

[RFCv1] rtc: m41t80: disable clock provider support
 2019-11-12 22:20 UTC  (8+ messages)

[PATCH v8 0/4] MSM8998 Multimedia Clock Controller
 2019-11-12 22:03 UTC  (16+ messages)
` [PATCH v8 1/4] dt-bindings: clock: Document external clocks for MSM8998 gcc
` [PATCH v8 2/4] dt-bindings: clock: Convert qcom,mmcc to DT schema
` [PATCH v8 3/4] dt-bindings: clock: Add support for the MSM8998 mmcc
` [PATCH v8 4/4] clk: qcom: Add MSM8998 Multimedia Clock Controller (MMCC) driver

[PATCH v2 0/5] add the DDR clock controller on Meson8 and Meson8b
 2019-11-12 20:52 UTC  (5+ messages)
` [PATCH v2 2/5] clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller

[PATCH] clk: sunxi-ng: v3s: Fix incorrect number of hw_clks
 2019-11-12 19:16 UTC  (3+ messages)

Investment opportunity
 2019-11-12 17:57 UTC 

[Patch v2 0/3] ARM: dts: am43x-vpfe/ov2659.patch
 2019-11-12 15:39 UTC  (5+ messages)
` [Patch v2 1/3] ARM: dts: am43xx: add support for clkout1 clock
` [Patch v2 2/3] ARM: dts: am437x-sk-evm: Add VPFE and OV2659 entries
` [Patch v2 3/3] ARM: dts: am43x-epos-evm: "

[Patch v3 00/10] ARM: dts: dra7: add cal nodes
 2019-11-12 15:38 UTC  (16+ messages)
` [Patch v3 01/10] clk: ti: dra7: add cam clkctrl data
` [Patch v3 02/10] ARM: dts: dra7: add cam clkctrl node
` [Patch v3 03/10] ARM: OMAP: DRA7xx: Make CAM clock domain SWSUP only
` [Patch v3 04/10] ARM: dts: dra7-l4: Add ti-sysc node for CAM
` [Patch v3 05/10] ARM: dts: DRA72: Add CAL dtsi node
` [Patch v3 06/10] arm: dts: dra72-evm-common: Add entries for the CSI2 cameras
` [Patch v3 07/10] arm: dtsi: dra76x: Add CAL dtsi node
` [Patch v3 08/10] arm: dts: dra76-evm: Add CAL and OV5640 nodes
` [Patch v3 09/10] arm64: dts: k3-am65-main Add CAL node
` [Patch v3 10/10] arm64: dts: k3-am654-base-board: Add CSI2 OV5640 camera

[Patch v4 0/3] ARM: dts: dra7: add vpe nodes
 2019-11-12 15:27 UTC  (6+ messages)
` [Patch v4 1/3] clk: ti: dra7: add vpe clkctrl data
` [Patch v4 2/3] ARM: dts: dra7: add vpe clkctrl node
` [Patch v4 3/3] ARM: dts: dra7: Add ti-sysc node for VPE

[PATCH] clk: at91: sam9x60-pll: adapt PMC_PLL_ACR default value
 2019-11-12 10:38 UTC  (2+ messages)

clk: X1000: Add support for the X1000
 2019-11-12  0:55 UTC  (7+ messages)
` clk: X1000: Add support for the X1000 v3
  ` [PATCH 1/2 v3] dt-bindings: clock: Add X1000 bindings
  ` [PATCH 2/2 v3] clk: Ingenic: Add CGU driver for X1000

[PATCH v4 00/10] NVIDIA Tegra20 CPUFreq driver major update
 2019-11-11 20:54 UTC  (11+ messages)
` [PATCH v4 01/10] clk: tegra: Add custom CCLK implementation
` [PATCH v4 02/10] clk: tegra: pll: Add pre/post rate-change hooks
` [PATCH v4 03/10] clk: tegra: cclk: Add helpers for handling PLLX rate changes
` [PATCH v4 04/10] clk: tegra20: Use custom CCLK implementation
` [PATCH v4 05/10] clk: tegra30: "
` [PATCH v4 06/10] dt-bindings: cpufreq: Add binding for NVIDIA Tegra20/30
` [PATCH v4 07/10] cpufreq: tegra20: Use generic cpufreq-dt driver (Tegra30 supported now)
` [PATCH v4 08/10] ARM: tegra: Create tegra20-cpufreq platform device on Tegra30
` [PATCH v4 09/10] ARM: dts: tegra30: beaver: Set up voltage regulators for DVFS
` [PATCH v4 10/10] ARM: dts: tegra30: beaver: Add CPU Operating Performance Points

[PATCH v3 0/6] PM / devfreq: Add dynamic scaling for imx ddr controller
 2019-11-11 14:29 UTC  (4+ messages)
` [PATCH v3 6/6] arm64: dts: imx8m: Add ddr controller nodes

[PATCH] clk: sunxi: use of_device_get_match_data
 2019-11-11 12:45 UTC  (2+ messages)

[PATCH] clk: zynqmp: Add support for custom type flags
 2019-11-11 12:42 UTC  (3+ messages)

[PATCH] clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flag
 2019-11-11 12:19 UTC  (3+ messages)

[RFC PATCH v3 00/15] Support ROHM BD71828 PMIC
 2019-11-11 11:20 UTC  (7+ messages)
` [RFC PATCH v3 01/15] mfd: bd71828: Support ROHM BD71828 PMIC - core
` [RFC PATCH v3 05/15] mfd: input: bd71828: Add power-key support

[v8 1/2] dt/bindings: clk: Add YAML schemas for LS1028A Display Clock bindings
 2019-11-11 10:20 UTC  (2+ messages)
` [v8 2/2] clk: ls1028a: Add clock driver for Display output interface

[PATCH] clk: clk-gpio: Add dt option to propagate rate change to parent
 2019-11-11  9:31 UTC  (4+ messages)
` [PATCH v3] clk: clk-gpio: "

[RESEND PATCH v2] clk: sprd: Use IS_ERR() to validate the return value of syscon_regmap_lookup_by_phandle()
 2019-11-11  3:44 UTC 

[v6 1/2] dt/bindings: clk: Add YAML schemas for LS1028A Display Clock bindings
 2019-11-11  2:02 UTC  (8+ messages)
` [v6 2/2] clk: ls1028a: Add clock driver for Display output interface
        ` [EXT] "

[PATCH v2 1/3] dt-bindings: power: Convert Generic Power Domain bindings to json-schema
 2019-11-10 10:20 UTC  (2+ messages)

[PATCH -next] clk: tegra: Use match_string() helper to simplify the code
 2019-11-09  3:42 UTC 

[PATCH 0/5] clk: tegra: SOR clock rework
 2019-11-09  0:39 UTC  (11+ messages)
` [PATCH 1/5] clk: tegra: Remove last remains of TEGRA210_CLK_SOR1_SRC
` [PATCH 2/5] clk: tegra: Move SOR0 implementation to Tegra124
` [PATCH 3/5] clk: tegra: Rename sor0_lvds to sor0_out
` [PATCH 4/5] clk: tegra: Reimplement SOR clock on Tegra124
` [PATCH 5/5] clk: tegra: Reimplement SOR clocks on Tegra210

[PATCH v9 00/22] SC7 entry and exit support for Tegra210
 2019-11-08 23:38 UTC  (4+ messages)
` [PATCH v9 11/22] clk: tegra: clk-dfll: Add suspend and resume support

[PATCH v7 0/6] MSM8998 Multimedia Clock Controller
 2019-11-08 22:56 UTC  (8+ messages)
` [PATCH v7 1/6] dt-bindings: clock: Document external clocks for MSM8998 gcc
` [PATCH v7 3/6] dt-bindings: clock: Convert qcom,mmcc to DT schema
` [PATCH v7 5/6] clk: qcom: Add MSM8998 Multimedia Clock Controller (MMCC) driver

Potential uninitialized variable "reg" in clk: axi-clkgen
 2019-11-08 22:28 UTC  (2+ messages)

[PATCH v2] dt-bindings: clk: Make example a bit clearer
 2019-11-08 22:18 UTC  (5+ messages)


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