From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 272AAC4707D for ; Fri, 21 May 2021 16:54:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 01758613D9 for ; Fri, 21 May 2021 16:54:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237846AbhEUQ4U (ORCPT ); Fri, 21 May 2021 12:56:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46304 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237802AbhEUQ4T (ORCPT ); Fri, 21 May 2021 12:56:19 -0400 Received: from mail-yb1-xb35.google.com (mail-yb1-xb35.google.com [IPv6:2607:f8b0:4864:20::b35]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 802D0C0613ED; Fri, 21 May 2021 09:54:55 -0700 (PDT) Received: by mail-yb1-xb35.google.com with SMTP id y2so28316233ybq.13; Fri, 21 May 2021 09:54:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=qNDhTrL0N439MhCKg5eDpr3/xHuRHa7DwSQYNtIdcTc=; b=WwdqXcgkSphVGeoYQlwRAjESqehVHk0iWq4Hwnz7H3YB9/GZzb75+r6bEGjrTtxd5y fHmyW12pXz0H0J38qTEh5DVLXJPLPjxK7eDSM9BSM/OY4QcSiLfMjiMHaT8lNCn9ZCZQ LdUfN3LPQNTCCWG0bUIgoGtxLdjnPnrEqhEYdr48aKDzNm6AbjeP1Ya/VyfGoy8E3Omd ZSZKpZdII0x+uSWvYiBBMxnLf01qzYYioqVEYlr74q2OBgKNneIBb8R+VNjvFO9C+kju zeo/+/BCxzlIOzUH0ieeLtpcVMdtxif1ksyL6v+I2C9YXsr7IR+clK/KvLMcBUT2cpjk SVFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=qNDhTrL0N439MhCKg5eDpr3/xHuRHa7DwSQYNtIdcTc=; b=Xy4LDMgY/52pL3FI4tEYmBqGo7K73h1SnvVZQ9dx5xol4bZEjBmetFGJi0uBVRQLh1 stb5pxwdU4EMSNpsboszkKAATKP6GkM1/n0JLVANUZcg264eDGXbLUd9vTHFhxSXs+vN nyyn/kVUc6AVQgIzKYik9cGrsfW077x3YKfWptf49kBPSzUTAIxiy+QpdDUdkqKAkZN1 1ZsGCoUJKDWvDVqK65xm5u8k2teJVvQFmAsvB0r9N9zs8sphkqC6YrtXdRJQK3RNuZr4 HfuYoFG0NodwP1eNvn0rt7OPnmFsd9+JYwY4cRVRI2p7Hp03xuIcaXaKw0hwoCfOBtD+ tg+A== X-Gm-Message-State: AOAM530s3q1GTtG/SxJ4tDj4LJoXcfPM+C3EluxKlXEfdHyB2N1Mfpz6 DqcZXYGHIncyFwNMWCOOs/4GMJQ9mXxE/O76dnUKa2iu5JkA6Q== X-Google-Smtp-Source: ABdhPJxONwR6QDdA9LeS1LweNBya46DuCsYhueVEKoLegPrTeGkUQu8Juviv7rZjLX7+D4hzR13IAdqfWFpN2ysDQ3A= X-Received: by 2002:a25:358a:: with SMTP id c132mr16256369yba.179.1621616093932; Fri, 21 May 2021 09:54:53 -0700 (PDT) MIME-Version: 1.0 References: <20210514192218.13022-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20210514192218.13022-2-prabhakar.mahadev-lad.rj@bp.renesas.com> In-Reply-To: From: "Lad, Prabhakar" Date: Fri, 21 May 2021 17:54:28 +0100 Message-ID: Subject: Re: [PATCH 01/16] dt-bindings: arm: renesas: Document Renesas RZ/G2UL SoC To: Geert Uytterhoeven Cc: Lad Prabhakar , Rob Herring , Magnus Damm , Michael Turquette , Stephen Boyd , Greg Kroah-Hartman , Catalin Marinas , Will Deacon , Jiri Slaby , Philipp Zabel , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Linux Kernel Mailing List , Linux-Renesas , linux-clk , "open list:SERIAL DRIVERS" , Linux ARM , Biju Das Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Hi Geert, Thank you for the review. On Fri, May 21, 2021 at 2:23 PM Geert Uytterhoeven wrote: > > Hi Prabhakar, > > On Fri, May 14, 2021 at 9:23 PM Lad Prabhakar > wrote: > > Add device tree bindings documentation for Renesas RZ/G2UL SoC. > > > > Signed-off-by: Lad Prabhakar > > Reviewed-by: Biju Das > > Reviewed-by: Chris Paterson > > Thanks for your patch! > > > --- a/Documentation/devicetree/bindings/arm/renesas.yaml > > +++ b/Documentation/devicetree/bindings/arm/renesas.yaml > > @@ -302,6 +302,12 @@ properties: > > - renesas,rzn1d400-db # RZN1D-DB (RZ/N1D Demo Board for the RZ/N1D 400 pins package) > > - const: renesas,r9a06g032 > > > > + - description: RZ/G2UL (R9A07G043) > > + items: > > + - enum: > > + - renesas,r9a07g043u11 # Single Cortex-A55 RZ/G2UL > > Is there any specific reason you're including the final "1", unlike the > RZ/G2{L,LC} binding? > To be consistent with the RZ/G2L family of SoC's "1" is appended to the compatible string. > As RZ/G2UL is always single-core, perhaps this compatible value can be > dropped? > Do agree with you. > > + - const: renesas,r9a07g043 > > + > > additionalProperties: true > > For now, there are no users of this binding? > I assume you're posting it already, as RZ/G2UL is pin-compatible with RZ/G2LC, > and thus can be used interchangeably on the G2L SOM? > However, the DTS board part in this series is for RZ/G2L, not RZ/GLC? > Intention here is to start with RZ/G2L SoC first so that the core changes (pinctrl/CPG) hit upstream and for the rest of the SoC's it will be followed up. Cheers, Prabhakar > Reviewed-by: Geert Uytterhoeven > i.e. will queue in renesas-devel for v5.14, after the above have been > resolved. > > Gr{oetje,eeting}s, > > Geert > > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds