* [PATCH 0/2] clk: aspeed: Expose RMII RCLK gate for MACs 1-2 on AST2500
@ 2019-10-08 11:35 Andrew Jeffery
2019-10-08 11:35 ` [PATCH 1/2] dt-bindings: clock: Add AST2500 RMII RCLK definitions Andrew Jeffery
2019-10-08 11:35 ` [PATCH 2/2] clk: aspeed: Add RMII RCLK gates for both AST2500 MACs Andrew Jeffery
0 siblings, 2 replies; 5+ messages in thread
From: Andrew Jeffery @ 2019-10-08 11:35 UTC (permalink / raw)
To: linux-clk
Cc: mturquette, sboyd, joel, robh+dt, mark.rutland, linux-arm-kernel,
linux-aspeed, linux-kernel, devicetree
Hello,
This series is two small changes enable kernel support for controlling the RMII
RCLK gate on AST2500-based systems. Previously the kernel has assumed u-boot
has ungated RCLK for networking to function.
RMII is commonly used for NCSI, which itself is commonly used for BMC-based
designs to reduce cabling requirements for the platform.
Please review!
Andrew
Andrew Jeffery (2):
dt-bindings: clock: Add AST2500 RMII RCLK definitions
clk: aspeed: Add RMII RCLK gates for both AST2500 MACs
drivers/clk/clk-aspeed.c | 27 +++++++++++++++++++++++-
include/dt-bindings/clock/aspeed-clock.h | 2 ++
2 files changed, 28 insertions(+), 1 deletion(-)
--
2.20.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] dt-bindings: clock: Add AST2500 RMII RCLK definitions
2019-10-08 11:35 [PATCH 0/2] clk: aspeed: Expose RMII RCLK gate for MACs 1-2 on AST2500 Andrew Jeffery
@ 2019-10-08 11:35 ` Andrew Jeffery
2019-10-08 12:37 ` Joel Stanley
2019-10-08 11:35 ` [PATCH 2/2] clk: aspeed: Add RMII RCLK gates for both AST2500 MACs Andrew Jeffery
1 sibling, 1 reply; 5+ messages in thread
From: Andrew Jeffery @ 2019-10-08 11:35 UTC (permalink / raw)
To: linux-clk
Cc: mturquette, sboyd, joel, robh+dt, mark.rutland, linux-arm-kernel,
linux-aspeed, linux-kernel, devicetree
The AST2500 has an explicit gate for the RMII RCLK for each of the two
MACs.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
include/dt-bindings/clock/aspeed-clock.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/dt-bindings/clock/aspeed-clock.h b/include/dt-bindings/clock/aspeed-clock.h
index f43738607d77..64e245fb113f 100644
--- a/include/dt-bindings/clock/aspeed-clock.h
+++ b/include/dt-bindings/clock/aspeed-clock.h
@@ -39,6 +39,8 @@
#define ASPEED_CLK_BCLK 33
#define ASPEED_CLK_MPLL 34
#define ASPEED_CLK_24M 35
+#define ASPEED_CLK_GATE_MAC1RCLK 36
+#define ASPEED_CLK_GATE_MAC2RCLK 37
#define ASPEED_RESET_XDMA 0
#define ASPEED_RESET_MCTP 1
--
2.20.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/2] clk: aspeed: Add RMII RCLK gates for both AST2500 MACs
2019-10-08 11:35 [PATCH 0/2] clk: aspeed: Expose RMII RCLK gate for MACs 1-2 on AST2500 Andrew Jeffery
2019-10-08 11:35 ` [PATCH 1/2] dt-bindings: clock: Add AST2500 RMII RCLK definitions Andrew Jeffery
@ 2019-10-08 11:35 ` Andrew Jeffery
1 sibling, 0 replies; 5+ messages in thread
From: Andrew Jeffery @ 2019-10-08 11:35 UTC (permalink / raw)
To: linux-clk
Cc: mturquette, sboyd, joel, robh+dt, mark.rutland, linux-arm-kernel,
linux-aspeed, linux-kernel, devicetree
RCLK is a fixed 50MHz clock derived from HPLL that is described by a
single gate for each MAC.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
drivers/clk/clk-aspeed.c | 27 ++++++++++++++++++++++++++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/clk-aspeed.c b/drivers/clk/clk-aspeed.c
index abf06fb6453e..867d8771bb1e 100644
--- a/drivers/clk/clk-aspeed.c
+++ b/drivers/clk/clk-aspeed.c
@@ -14,7 +14,7 @@
#include "clk-aspeed.h"
-#define ASPEED_NUM_CLKS 36
+#define ASPEED_NUM_CLKS 38
#define ASPEED_RESET2_OFFSET 32
@@ -28,6 +28,7 @@
#define AST2400_HPLL_BYPASS_EN BIT(17)
#define ASPEED_MISC_CTRL 0x2c
#define UART_DIV13_EN BIT(12)
+#define ASPEED_MAC_CLK_DLY 0x48
#define ASPEED_STRAP 0x70
#define CLKIN_25MHZ_EN BIT(23)
#define AST2400_CLK_SOURCE_SEL BIT(18)
@@ -462,6 +463,30 @@ static int aspeed_clk_probe(struct platform_device *pdev)
return PTR_ERR(hw);
aspeed_clk_data->hws[ASPEED_CLK_MAC] = hw;
+ if (of_device_is_compatible(pdev->dev.of_node, "aspeed,ast2500-scu")) {
+ /* RMII 50MHz RCLK */
+ hw = clk_hw_register_fixed_rate(dev, "mac12rclk", "hpll", 0,
+ 50000000);
+ if (IS_ERR(hw))
+ return PTR_ERR(hw);
+
+ /* RMII1 50MHz (RCLK) output enable */
+ hw = clk_hw_register_gate(dev, "mac1rclk-gate", "mac12rclk", 0,
+ scu_base + ASPEED_MAC_CLK_DLY, 29, 0,
+ &aspeed_clk_lock);
+ if (IS_ERR(hw))
+ return PTR_ERR(hw);
+ aspeed_clk_data->hws[ASPEED_CLK_GATE_MAC1RCLK] = hw;
+
+ /* RMII2 50MHz (RCLK) output enable */
+ hw = clk_hw_register_gate(dev, "mac2rclk-gate", "mac12rclk", 0,
+ scu_base + ASPEED_MAC_CLK_DLY, 30, 0,
+ &aspeed_clk_lock);
+ if (IS_ERR(hw))
+ return PTR_ERR(hw);
+ aspeed_clk_data->hws[ASPEED_CLK_GATE_MAC2RCLK] = hw;
+ }
+
/* LPC Host (LHCLK) clock divider */
hw = clk_hw_register_divider_table(dev, "lhclk", "hpll", 0,
scu_base + ASPEED_CLK_SELECTION, 20, 3, 0,
--
2.20.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] dt-bindings: clock: Add AST2500 RMII RCLK definitions
2019-10-08 11:35 ` [PATCH 1/2] dt-bindings: clock: Add AST2500 RMII RCLK definitions Andrew Jeffery
@ 2019-10-08 12:37 ` Joel Stanley
2019-10-10 0:52 ` Andrew Jeffery
0 siblings, 1 reply; 5+ messages in thread
From: Joel Stanley @ 2019-10-08 12:37 UTC (permalink / raw)
To: Andrew Jeffery
Cc: linux-clk, Michael Turquette, Stephen Boyd, Rob Herring,
Mark Rutland, Linux ARM, linux-aspeed, Linux Kernel Mailing List,
devicetree
On Tue, 8 Oct 2019 at 11:34, Andrew Jeffery <andrew@aj.id.au> wrote:
>
> The AST2500 has an explicit gate for the RMII RCLK for each of the two
> MACs.
>
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> ---
> include/dt-bindings/clock/aspeed-clock.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/include/dt-bindings/clock/aspeed-clock.h b/include/dt-bindings/clock/aspeed-clock.h
> index f43738607d77..64e245fb113f 100644
> --- a/include/dt-bindings/clock/aspeed-clock.h
> +++ b/include/dt-bindings/clock/aspeed-clock.h
> @@ -39,6 +39,8 @@
> #define ASPEED_CLK_BCLK 33
> #define ASPEED_CLK_MPLL 34
> #define ASPEED_CLK_24M 35
> +#define ASPEED_CLK_GATE_MAC1RCLK 36
> +#define ASPEED_CLK_GATE_MAC2RCLK 37
Calling these ASPEED_CLK_GATE breaks the pattern the rest of the
driver has in using that name for the clocks that are registered as
struct aspeed_clk_gate clocks.
Do you think we should drop the GATE_ to match the existing clocks?
>
> #define ASPEED_RESET_XDMA 0
> #define ASPEED_RESET_MCTP 1
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] dt-bindings: clock: Add AST2500 RMII RCLK definitions
2019-10-08 12:37 ` Joel Stanley
@ 2019-10-10 0:52 ` Andrew Jeffery
0 siblings, 0 replies; 5+ messages in thread
From: Andrew Jeffery @ 2019-10-10 0:52 UTC (permalink / raw)
To: Joel Stanley
Cc: linux-clk, Michael Turquette, Stephen Boyd, Rob Herring,
Mark Rutland, Linux ARM, linux-aspeed, Linux Kernel Mailing List,
devicetree
On Tue, 8 Oct 2019, at 23:07, Joel Stanley wrote:
> On Tue, 8 Oct 2019 at 11:34, Andrew Jeffery <andrew@aj.id.au> wrote:
> >
> > The AST2500 has an explicit gate for the RMII RCLK for each of the two
> > MACs.
> >
> > Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> > ---
> > include/dt-bindings/clock/aspeed-clock.h | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/include/dt-bindings/clock/aspeed-clock.h b/include/dt-bindings/clock/aspeed-clock.h
> > index f43738607d77..64e245fb113f 100644
> > --- a/include/dt-bindings/clock/aspeed-clock.h
> > +++ b/include/dt-bindings/clock/aspeed-clock.h
> > @@ -39,6 +39,8 @@
> > #define ASPEED_CLK_BCLK 33
> > #define ASPEED_CLK_MPLL 34
> > #define ASPEED_CLK_24M 35
> > +#define ASPEED_CLK_GATE_MAC1RCLK 36
> > +#define ASPEED_CLK_GATE_MAC2RCLK 37
>
> Calling these ASPEED_CLK_GATE breaks the pattern the rest of the
> driver has in using that name for the clocks that are registered as
> struct aspeed_clk_gate clocks.
>
> Do you think we should drop the GATE_ to match the existing clocks?
I named them that way because the bits in question do just gate the
clocks, but I've renamed them to keep the pattern. Will send a v2.
Andrew
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2019-10-10 0:51 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2019-10-08 11:35 [PATCH 0/2] clk: aspeed: Expose RMII RCLK gate for MACs 1-2 on AST2500 Andrew Jeffery
2019-10-08 11:35 ` [PATCH 1/2] dt-bindings: clock: Add AST2500 RMII RCLK definitions Andrew Jeffery
2019-10-08 12:37 ` Joel Stanley
2019-10-10 0:52 ` Andrew Jeffery
2019-10-08 11:35 ` [PATCH 2/2] clk: aspeed: Add RMII RCLK gates for both AST2500 MACs Andrew Jeffery
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