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From: Chen-Yu Tsai <wenst@chromium.org>
To: Maxime Ripard <maxime@cerno.tech>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	linux-clk@vger.kernel.org,
	AngeloGioacchino Del Regno 
	<angelogioacchino.delregno@collabora.com>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org
Subject: Re: [PATCH v4 29/68] clk: mediatek: cpumux: Add a determine_rate hook
Date: Mon, 8 May 2023 10:36:21 +0800	[thread overview]
Message-ID: <CAGXv+5E7pi5_R1u=dpTSVdBPhG6_GFnJpatbExhB2W2dhue9cQ@mail.gmail.com> (raw)
In-Reply-To: <20221018-clk-range-checks-fixes-v4-29-971d5077e7d2@cerno.tech>

On Fri, May 5, 2023 at 7:27 PM Maxime Ripard <maxime@cerno.tech> wrote:
>
> The Mediatek cpumux clock implements a mux with a set_parent hook, but
> doesn't provide a determine_rate implementation.
>
> This is a bit odd, since set_parent() is there to, as its name implies,
> change the parent of a clock. However, the most likely candidates to
> trigger that parent change are either the assigned-clock-parents device
> tree property or a call to clk_set_rate(), with determine_rate()
> figuring out which parent is the best suited for a given rate.
>
> The other trigger would be a call to clk_set_parent(), but it's far less
> used, and it doesn't look like there's any obvious user for that clock.
>
> Similarly, it doesn't look like the device tree using that clock driver
> uses any of the assigned-clock properties on that clock.
>
> So, the set_parent hook is effectively unused, possibly because of an
> oversight. However, it could also be an explicit decision by the
> original author to avoid any reparenting but through an explicit call to
> clk_set_parent().

The consumer, the cpufreq driver, assumes the original parent to be
the dedicated PLL that drives it. It gets a reference to the original
parent with clk_get_parent(). It also gets an intermediate (stable) clock
via DT. It does explicit clk_set_parent() calls to switch to/from the
stable clock, and does clk_set_rate() on the dedicated PLL in between.

So yeah, they only use set_parent hook.

> The latter case would be equivalent to setting the determine_rate
> implementation to clk_hw_determine_rate_no_reparent(). Indeed, if no
> determine_rate implementation is provided, clk_round_rate() (through
> clk_core_round_rate_nolock()) will call itself on the parent if
> CLK_SET_RATE_PARENT is set, and will not change the clock rate
> otherwise.
>
> And if it was an oversight, then we are at least explicit about our
> behavior now and it can be further refined down the line.
>
> Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> Cc: Matthias Brugger <matthias.bgg@gmail.com>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-mediatek@lists.infradead.org
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>

Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>

  reply	other threads:[~2023-05-08  2:36 UTC|newest]

Thread overview: 98+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-05 11:25 [PATCH v4 00/68] clk: Make determine_rate mandatory for muxes Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 01/68] clk: Export clk_hw_forward_rate_request() Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 02/68] clk: test: Fix type sign of rounded rate variables Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 03/68] clk: Move no reparent case into a separate function Maxime Ripard
     [not found]   ` <CGME20230613111502eucas1p2644889c9de1abfe1a14a3b549772f247@eucas1p2.samsung.com>
2023-06-13 11:15     ` Marek Szyprowski
     [not found]       ` <CGME20230613121511eucas1p2595e0de21fadbafc1f6ffdc5636b9271@eucas1p2.samsung.com>
2023-06-13 12:15         ` Marek Szyprowski
2023-06-13 12:29           ` Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 04/68] clk: Introduce clk_hw_determine_rate_no_reparent() Maxime Ripard
2023-05-05 17:15   ` kernel test robot
2023-05-05 11:25 ` [PATCH v4 05/68] clk: lan966x: Remove unused round_rate hook Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 06/68] clk: nodrv: Add a determine_rate hook Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 07/68] clk: test: " Maxime Ripard
2023-06-09  1:41   ` Stephen Boyd
2023-06-13  8:21     ` Maxime Ripard
2023-06-13 18:39       ` Stephen Boyd
2023-06-19 13:20         ` Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 08/68] clk: actions: composite: Add a determine_rate hook for pass clk Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 09/68] clk: at91: main: Add a determine_rate hook Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 10/68] clk: at91: sckc: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 11/68] clk: berlin: div: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 12/68] clk: cdce706: " Maxime Ripard
2023-05-05 21:00   ` kernel test robot
2023-05-05 11:25 ` [PATCH v4 13/68] clk: k210: pll: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 14/68] clk: k210: aclk: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 15/68] clk: k210: mux: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 16/68] clk: lmk04832: clkout: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 17/68] clk: lochnagar: " Maxime Ripard
2023-05-05 17:46   ` kernel test robot
2023-05-05 18:47   ` kernel test robot
2023-05-05 11:25 ` [PATCH v4 18/68] clk: qoriq: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 19/68] clk: si5341: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 20/68] clk: stm32f4: mux: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 21/68] clk: vc5: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 22/68] clk: vc5: clkout: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 23/68] clk: wm831x: " Maxime Ripard
2023-05-05 18:06   ` kernel test robot
2023-05-05 11:25 ` [PATCH v4 24/68] clk: davinci: da8xx-cfgchip: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 25/68] " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 26/68] clk: imx: busy: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 27/68] clk: imx: fixup-mux: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 28/68] clk: imx: scu: " Maxime Ripard
2023-05-06  0:37   ` kernel test robot
2023-05-05 11:25 ` [PATCH v4 29/68] clk: mediatek: cpumux: " Maxime Ripard
2023-05-08  2:36   ` Chen-Yu Tsai [this message]
2023-05-05 11:25 ` [PATCH v4 30/68] clk: pxa: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 31/68] clk: renesas: r9a06g032: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 32/68] clk: socfpga: gate: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 33/68] clk: stm32: core: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 34/68] clk: tegra: bpmp: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 35/68] clk: tegra: super: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 36/68] clk: tegra: periph: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 37/68] clk: ux500: prcmu: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 38/68] clk: ux500: sysctrl: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 39/68] clk: versatile: sp810: " Maxime Ripard
2023-05-05 11:30   ` Linus Walleij
2023-05-05 19:04     ` Pawel Moll
2023-05-05 11:25 ` [PATCH v4 40/68] drm/tegra: sor: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 41/68] phy: cadence: sierra: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 42/68] phy: cadence: torrent: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 43/68] phy: ti: am654-serdes: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 44/68] phy: ti: j721e-wiz: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 45/68] rtc: sun6i: " Maxime Ripard
2023-05-05 18:46   ` Jernej Škrabec
2023-05-05 11:25 ` [PATCH v4 46/68] ASoC: tlv320aic32x4: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 47/68] clk: actions: composite: div: Switch to determine_rate Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 48/68] clk: actions: composite: fact: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 49/68] clk: at91: smd: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 50/68] clk: axi-clkgen: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 51/68] clk: cdce706: divider: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 52/68] clk: cdce706: clkout: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 53/68] clk: si5341: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 54/68] clk: si5351: pll: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 55/68] clk: si5351: msynth: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 56/68] clk: si5351: clkout: " Maxime Ripard
2023-05-05 11:25 ` [PATCH v4 57/68] clk: da8xx: clk48: " Maxime Ripard
2023-05-05 11:26 ` [PATCH v4 58/68] clk: imx: scu: " Maxime Ripard
2023-05-05 11:26 ` [PATCH v4 59/68] clk: ingenic: cgu: " Maxime Ripard
2023-05-05 11:26 ` [PATCH v4 60/68] clk: ingenic: tcu: " Maxime Ripard
2023-05-05 11:26 ` [PATCH v4 61/68] clk: sprd: composite: " Maxime Ripard
2023-06-13 17:11   ` Harshit Mogalapalli
2023-06-13 19:21     ` Stephen Boyd
2023-06-13 19:45       ` Harshit Mogalapalli
2023-05-05 11:26 ` [PATCH v4 62/68] clk: st: flexgen: " Maxime Ripard
2023-05-05 11:26 ` [PATCH v4 63/68] clk: stm32: composite: " Maxime Ripard
2023-05-05 11:26 ` [PATCH v4 64/68] clk: tegra: periph: " Maxime Ripard
2023-05-05 11:26 ` [PATCH v4 65/68] clk: tegra: super: " Maxime Ripard
2023-06-18 23:38   ` Dmitry Osipenko
2023-06-19  7:26     ` Maxime Ripard
2023-06-20 19:09       ` Stephen Boyd
2023-06-21 15:35         ` Thierry Reding
2023-06-22 11:24           ` Maxime Ripard
2023-06-23 14:51             ` Thierry Reding
2023-06-23 15:02               ` Maxime Ripard
2023-06-22 11:32           ` Dmitry Osipenko
2023-06-30  4:57           ` Stephen Boyd
2023-05-05 11:26 ` [PATCH v4 66/68] ASoC: tlv320aic32x4: pll: " Maxime Ripard
2023-05-05 11:26 ` [PATCH v4 67/68] ASoC: tlv320aic32x4: div: " Maxime Ripard
2023-05-05 11:26 ` [PATCH v4 68/68] clk: Forbid to register a mux without determine_rate Maxime Ripard

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