From: Rob Herring <robh@kernel.org>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
Peter De Schrijver <pdeschrijver@nvidia.com>,
Prashant Gaikwad <pgaikwad@nvidia.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Joseph Lo <josephl@nvidia.com>,
devicetree@vger.kernel.org, linux-clk <linux-clk@vger.kernel.org>,
linux-tegra@vger.kernel.org,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 2/4] dt-bindings: memory: Add binding for NVIDIA Tegra30 External Memory Controller
Date: Wed, 1 May 2019 19:17:03 -0500 [thread overview]
Message-ID: <CAL_JsqKCWytgQEDPLX27xdaDrARtHssbhFcL47RO0zfECm0Gig@mail.gmail.com> (raw)
In-Reply-To: <137c766e-66f6-828a-5c3b-f526d66d37bd@gmail.com>
On Wed, May 1, 2019 at 7:06 PM Dmitry Osipenko <digetx@gmail.com> wrote:
>
> 30.04.2019 1:05, Rob Herring пишет:
> > On Sun, Apr 14, 2019 at 11:20:07PM +0300, Dmitry Osipenko wrote:
> >> Add device-tree binding for NVIDIA Tegra30 External Memory Controller.
> >> The binding is based on the Tegra124 EMC binding since hardware is
> >> similar, although there are couple significant differences.
> >
> > My comments on Tegra124 binding apply here.
>
> The common timing definition doesn't fully match the definition that is
> used by Tegra's Memory Controller, thus the DQS (data strobe) timing
> parameter is comprised of multiple sub-parameters that describe how to
> generate the strobe in hardware. There are also more additional
> parameters that are specific to Tegra and they are individually
> characterized for each memory model and clock rate. Hence the common
> timing definition isn't usable.
I don't understand. Every PC in the world can work with any DIMM
(within a given generation) just with SPD data. Why is that not
sufficient here?
In any case, it seems for Tegra124 a different approach is going to be
taken. Seems like an "avoid DT" solution to me, but if it's contained
within the firmware it's not my problem.
Rob
next prev parent reply other threads:[~2019-05-02 0:17 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-14 20:20 [PATCH v2 0/4] memory: tegra: Introduce Tegra30 EMC driver Dmitry Osipenko
2019-04-14 20:20 ` [PATCH v2 1/4] clk: tegra20/30: Add custom EMC clock implementation Dmitry Osipenko
2019-04-25 19:07 ` Stephen Boyd
2019-04-25 21:42 ` Dmitry Osipenko
2019-04-25 22:25 ` Stephen Boyd
2019-04-26 0:03 ` Dmitry Osipenko
2019-04-26 0:41 ` Stephen Boyd
2019-04-26 2:22 ` Dmitry Osipenko
2019-04-14 20:20 ` [PATCH v2 2/4] dt-bindings: memory: Add binding for NVIDIA Tegra30 External Memory Controller Dmitry Osipenko
2019-04-29 22:05 ` Rob Herring
2019-05-02 0:06 ` Dmitry Osipenko
2019-05-02 0:17 ` Rob Herring [this message]
2019-05-02 0:52 ` Dmitry Osipenko
2019-05-02 1:39 ` Dmitry Osipenko
2019-05-16 14:55 ` Dmitry Osipenko
2019-04-14 20:20 ` [PATCH v2 3/4] memory: tegra: Introduce Tegra30 EMC driver Dmitry Osipenko
2019-04-14 20:20 ` [PATCH v2 4/4] ARM: dts: tegra30: Add External Memory Controller node Dmitry Osipenko
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