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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Cc: Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	linux-clk <linux-clk@vger.kernel.org>
Subject: Re: [PATCH] clk: renesas: r8a77980-cpg-mssr: fix RPC-IF module clock's parent
Date: Mon, 11 Mar 2019 10:30:55 +0100	[thread overview]
Message-ID: <CAMuHMdWxkM2YbLqyz3BemcVJphWYSZi4ejuLiG+fpfDdnuU4Uw@mail.gmail.com> (raw)
In-Reply-To: <ebc41558-2a0a-bf6d-05df-077e3c769344@cogentembedded.com>

Hi Sergei,

Thanks for your patch!

On Thu, Mar 7, 2019 at 8:53 PM Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> Testing has shown that the RPC-IF module clock's parent is the RPCD2 clock,
> not the RPC one -- the RPC-IF register reads stall otherwise...

Perhaps... Or something else is wrong with how the RPC driver uses the
clock hierarchy.
According to the docs, RPC clocks RPC-PHY, and RPCD2 clocks RPC-LINK.
Currently nothing references RPCD2, so it is disabled automatically.
If you make RPC -> RPCD2 -> RPC-IF, enabling RPC-IF indeed enables
both RPC and RPCD2.

Perhaps the RPC device node does need a reference to RPCD2?

Is this also the case on R-Car V3M, where RPCD2 is not controlled by the
CPG, but by the DIVREG register in the RPC-IF module itself?

See also section 62.4.7 (Frequency change), which does not have a
subsection for V3H, but it may be impacted (changing RPCD2 causes
an additional read of RPCCKR, satisfying the read-after-write requirement
documented there).

> Fixes: 94e3935b5756 ("clk: renesas: r8a77980: Add RPC clocks")
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

> --- renesas-drivers.orig/drivers/clk/renesas/r8a77980-cpg-mssr.c
> +++ renesas-drivers/drivers/clk/renesas/r8a77980-cpg-mssr.c
> @@ -171,7 +171,7 @@ static const struct mssr_mod_clk r8a7798
>         DEF_MOD("gpio1",                 911,   R8A77980_CLK_CP),
>         DEF_MOD("gpio0",                 912,   R8A77980_CLK_CP),
>         DEF_MOD("can-fd",                914,   R8A77980_CLK_S3D2),
> -       DEF_MOD("rpc-if",                917,   R8A77980_CLK_RPC),
> +       DEF_MOD("rpc-if",                917,   R8A77980_CLK_RPCD2),
>         DEF_MOD("i2c4",                  927,   R8A77980_CLK_S0D6),
>         DEF_MOD("i2c3",                  928,   R8A77980_CLK_S0D6),
>         DEF_MOD("i2c2",                  929,   R8A77980_CLK_S3D2),

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

  reply	other threads:[~2019-03-11  9:31 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-22 19:55 [PATCH v3 0/4] Renesas R8A77980 CPG/MSSR RPC clock support Sergei Shtylyov
2019-01-22 19:57 ` [PATCH v3 1/4] clk: renesas: rcar-gen3-cpg: factor out cpg_reg_modify() Sergei Shtylyov
2019-01-22 19:58 ` [PATCH v3 2/4] clk: renesas: rcar-gen3-cpg: add spinlock Sergei Shtylyov
2019-01-22 19:59 ` [PATCH v3 3/4] clk: renesas: rcar-gen3-cpg: add RPC clocks Sergei Shtylyov
2019-01-25 10:25   ` Geert Uytterhoeven
2019-01-22 20:01 ` [PATCH v3 4/4] clk: renesas: r8a77980-cpg-mssr: " Sergei Shtylyov
2019-01-25 10:25 ` [PATCH v3 0/4] Renesas R8A77980 CPG/MSSR RPC clock support Geert Uytterhoeven
2019-03-07 19:53 ` [PATCH] clk: renesas: r8a77980-cpg-mssr: fix RPC-IF module clock's parent Sergei Shtylyov
2019-03-11  9:30   ` Geert Uytterhoeven [this message]
2019-03-11 17:14     ` Sergei Shtylyov
2019-03-11 19:10       ` Sergei Shtylyov
2019-09-27 18:09 ` [PATCH] clk: renesas: rcar-gen3: allow changing the RPC[D2] clocks Sergei Shtylyov
2019-10-07 11:45   ` Geert Uytterhoeven
2019-10-07 11:49     ` Sergei Shtylyov
2019-12-17 20:43       ` Geert Uytterhoeven
2019-12-18 19:34         ` Sergei Shtylyov
2019-12-20 14:31     ` Geert Uytterhoeven

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