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6656aa93-8b20-47fa-2211-08daa6bfba09 X-MS-Exchange-CrossTenant-originalarrivaltime: 05 Oct 2022 10:52:41.6315 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: dac28005-13e0-41b8-8280-7663835f2b1d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 9vtxLQYr5J/Ki5EaiKVdRW1X7TsD+xuWo4ix2NtMJVnDes5PA/Ms++u0kR4AGz+t43u/PZGnV1HZAo2rAYOUEA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR19MB4247 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: maxlinear.com Content-Language: en-US Content-Type: text/plain; charset=WINDOWS-1252 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org [Resend due to mail delivery failure in earlier reply - one email id got=20= =0Acorrupted somehow in earlier reply]=0A=0AHi Stephen,=0A=0A=0AOn 30/9/202= 2 9:02 am, Stephen Boyd wrote:=0A> This email was sent from outside of MaxL= inear.=0A>=20=0A>=20=0A> Quoting Rahul Tanwar (2022-09-28 23:10:10)=0A>> On= 29/9/2022 8:20 am, Stephen Boyd wrote:=0A>>>> + u32 mask;=0A>>>>=0A>= >>> + /*=0A>>>> + * Some clocks support parent clock dividers = but they do not=0A>>>> + * support clock gating (clk enable/disable)= . Such types of=0A>>>> + * clocks might call this function with widt= h as 0 during=0A>>>> + * clk_prepare_enable() call. Handle such case= s by not doing=0A>>>> + * anything during clk_prepare_enable() but h= andle clk_set_rate()=0A>>>> + * correctly=0A>>>> + */=0A>>>> = + if (!width)=0A>>>> + return;=0A>>>=0A>>> Why are the = clk_ops assigned in a way that makes the code get here? Why=0A>>> can't we = have different clk_ops, or not register the clks at all, when=0A>>> the har= dware can't be written?=0A>>=0A>>=0A>> The hardware can actually be written= for such clks but only for=0A>> clk_set_rate() op for setting the clk rate= . Just that hardware does not=0A>> provide any way to enable/disable such c= lks.=0A>>=0A>> Alternative way to handle such clks could be that the clk co= nsumer does=0A>> not invoke clk_prepare_enable() before invoking clk_set_ra= te(). But we=0A>> want to avoid making changes in the clk consumer code to = keep it=0A>> standard. And handle it here by just validating the width para= meter.=0A>=20=0A> Why not have different clk_ops then that doesn't do anyth= ing for=0A> enable/disable and only does it for set_rate?=0A>=20=0A=0A=0ATh= ere is only one clk entry which falls in this category. Adding a=0Adifferen= t clk_ops for just one clk would need many more lines of code=0Aaddition wh= ich appears to be a overkill.=0A=0AI have removed this change in v3 and use= d the driver internal flag to=0Ahandle this particular clk. That requires m= inimal change and looks=0Alogical addition.=0A=0AThanks,=0ARahul=0A=0A=0A>= =20=0A=0A