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From: Maxime Ripard <maxime@cerno.tech>
To: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Cc: linux-rpi-kernel@lists.infradead.org,
	bcm-kernel-feedback-list@broadcom.com,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Dave Stevenson <dave.stevenson@raspberrypi.com>,
	Tim Gover <tim.gover@raspberrypi.com>,
	Phil Elwell <phil@raspberrypi.com>,
	Mike Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	linux-clk@vger.kernel.org, Philipp Zabel <p.zabel@pengutronix.de>,
	Maxime Ripard <maxime@cerno.tech>
Subject: [PATCH v5 27/27] clk: bcm: rpi: Remove the quirks for the CPU clock
Date: Mon, 15 Jun 2020 10:41:07 +0200
Message-ID: <acdf820c2f78a25dd7480a0c018b8b387acd013e.1592210452.git-series.maxime@cerno.tech> (raw)
In-Reply-To: <cover.98f979c2af2337c57217016d21d7c68e1ac2ce8a.1592210452.git-series.maxime@cerno.tech>

The CPU clock has had so far a bunch of quirks to expose the clock tree
properly, but since we reverted to exposing them through the MMIO driver,
we can remove that code from the firmware driver.

Acked-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Tested-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/clk/bcm/clk-raspberrypi.c | 164 +-------------------------------
 1 file changed, 164 deletions(-)

diff --git a/drivers/clk/bcm/clk-raspberrypi.c b/drivers/clk/bcm/clk-raspberrypi.c
index adc0bb56008a..5cc82954e1ce 100644
--- a/drivers/clk/bcm/clk-raspberrypi.c
+++ b/drivers/clk/bcm/clk-raspberrypi.c
@@ -56,14 +56,6 @@ static char *rpi_firmware_clk_names[] = {
 #define RPI_FIRMWARE_STATE_ENABLE_BIT	BIT(0)
 #define RPI_FIRMWARE_STATE_WAIT_BIT	BIT(1)
 
-/*
- * Even though the firmware interface alters 'pllb' the frequencies are
- * provided as per 'pllb_arm'. We need to scale before passing them trough.
- */
-#define RPI_FIRMWARE_PLLB_ARM_DIV_RATE	2
-
-#define A2W_PLL_FRAC_BITS		20
-
 struct raspberrypi_clk {
 	struct device *dev;
 	struct rpi_firmware *firmware;
@@ -152,13 +144,6 @@ static unsigned long raspberrypi_fw_get_rate(struct clk_hw *hw,
 	return val;
 }
 
-static unsigned long raspberrypi_fw_pll_get_rate(struct clk_hw *hw,
-						 unsigned long parent_rate)
-{
-	return raspberrypi_fw_get_rate(hw, parent_rate) *
-		RPI_FIRMWARE_PLLB_ARM_DIV_RATE;
-}
-
 static int raspberrypi_fw_set_rate(struct clk_hw *hw, unsigned long rate,
 				   unsigned long parent_rate)
 {
@@ -177,142 +162,6 @@ static int raspberrypi_fw_set_rate(struct clk_hw *hw, unsigned long rate,
 	return ret;
 }
 
-static int raspberrypi_fw_pll_set_rate(struct clk_hw *hw, unsigned long rate,
-				       unsigned long parent_rate)
-{
-	u32 new_rate = rate / RPI_FIRMWARE_PLLB_ARM_DIV_RATE;
-
-	return raspberrypi_fw_set_rate(hw, new_rate, parent_rate);
-}
-
-/*
- * Sadly there is no firmware rate rounding interface. We borrowed it from
- * clk-bcm2835.
- */
-static int raspberrypi_pll_determine_rate(struct clk_hw *hw,
-					  struct clk_rate_request *req)
-{
-	u64 div, final_rate;
-	u32 ndiv, fdiv;
-
-	/* We can't use req->rate directly as it would overflow */
-	final_rate = clamp(req->rate, req->min_rate, req->max_rate);
-
-	div = (u64)final_rate << A2W_PLL_FRAC_BITS;
-	do_div(div, req->best_parent_rate);
-
-	ndiv = div >> A2W_PLL_FRAC_BITS;
-	fdiv = div & ((1 << A2W_PLL_FRAC_BITS) - 1);
-
-	final_rate = ((u64)req->best_parent_rate *
-					((ndiv << A2W_PLL_FRAC_BITS) + fdiv));
-
-	req->rate = final_rate >> A2W_PLL_FRAC_BITS;
-
-	return 0;
-}
-
-static const struct clk_ops raspberrypi_firmware_pll_clk_ops = {
-	.is_prepared = raspberrypi_fw_is_prepared,
-	.recalc_rate = raspberrypi_fw_pll_get_rate,
-	.set_rate = raspberrypi_fw_pll_set_rate,
-	.determine_rate = raspberrypi_pll_determine_rate,
-};
-
-static struct clk_hw *raspberrypi_register_pllb(struct raspberrypi_clk *rpi)
-{
-	struct raspberrypi_clk_data *data;
-	struct clk_init_data init = {};
-	u32 min_rate = 0, max_rate = 0;
-	int ret;
-
-	data = devm_kzalloc(rpi->dev, sizeof(*data), GFP_KERNEL);
-	if (!data)
-		return ERR_PTR(-ENOMEM);
-	data->rpi = rpi;
-	data->id = RPI_FIRMWARE_ARM_CLK_ID;
-
-	/* All of the PLLs derive from the external oscillator. */
-	init.parent_names = (const char *[]){ "osc" };
-	init.num_parents = 1;
-	init.name = "pllb";
-	init.ops = &raspberrypi_firmware_pll_clk_ops;
-	init.flags = CLK_GET_RATE_NOCACHE | CLK_IGNORE_UNUSED;
-
-	/* Get min & max rates set by the firmware */
-	ret = raspberrypi_clock_property(rpi->firmware, data,
-					 RPI_FIRMWARE_GET_MIN_CLOCK_RATE,
-					 &min_rate);
-	if (ret) {
-		dev_err(rpi->dev, "Failed to get %s min freq: %d\n",
-			init.name, ret);
-		return ERR_PTR(ret);
-	}
-
-	ret = raspberrypi_clock_property(rpi->firmware, data,
-					 RPI_FIRMWARE_GET_MAX_CLOCK_RATE,
-					 &max_rate);
-	if (ret) {
-		dev_err(rpi->dev, "Failed to get %s max freq: %d\n",
-			init.name, ret);
-		return ERR_PTR(ret);
-	}
-
-	if (!min_rate || !max_rate) {
-		dev_err(rpi->dev, "Unexpected frequency range: min %u, max %u\n",
-			min_rate, max_rate);
-		return ERR_PTR(-EINVAL);
-	}
-
-	dev_info(rpi->dev, "CPU frequency range: min %u, max %u\n",
-		 min_rate, max_rate);
-
-	data->hw.init = &init;
-
-	ret = devm_clk_hw_register(rpi->dev, &data->hw);
-	if (ret)
-		return ERR_PTR(ret);
-
-	clk_hw_set_rate_range(&data->hw,
-			      min_rate * RPI_FIRMWARE_PLLB_ARM_DIV_RATE,
-			      max_rate * RPI_FIRMWARE_PLLB_ARM_DIV_RATE);
-
-	return &data->hw;
-}
-
-static struct clk_fixed_factor raspberrypi_clk_pllb_arm = {
-	.mult = 1,
-	.div = 2,
-	.hw.init = &(struct clk_init_data) {
-		.name		= "pllb_arm",
-		.parent_names	= (const char *[]){ "pllb" },
-		.num_parents	= 1,
-		.ops		= &clk_fixed_factor_ops,
-		.flags		= CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE,
-	},
-};
-
-static struct clk_hw *raspberrypi_register_pllb_arm(struct raspberrypi_clk *rpi)
-{
-	int ret;
-
-	ret = devm_clk_hw_register(rpi->dev, &raspberrypi_clk_pllb_arm.hw);
-	if (ret) {
-		dev_err(rpi->dev, "Failed to initialize pllb_arm\n");
-		return ERR_PTR(ret);
-	}
-
-	ret = devm_clk_hw_register_clkdev(rpi->dev,
-					  &raspberrypi_clk_pllb_arm.hw,
-					  NULL, "cpu0");
-	if (ret) {
-		dev_err(rpi->dev, "Failed to initialize clkdev\n");
-		return ERR_PTR(ret);
-	}
-
-	return &raspberrypi_clk_pllb_arm.hw;
-}
-
 static int raspberrypi_fw_dumb_determine_rate(struct clk_hw *hw,
 					      struct clk_rate_request *req)
 {
@@ -341,19 +190,6 @@ static struct clk_hw *raspberrypi_clk_register(struct raspberrypi_clk *rpi,
 	u32 min_rate, max_rate;
 	int ret;
 
-	if (id == RPI_FIRMWARE_ARM_CLK_ID) {
-		struct clk_hw *hw;
-
-		hw = raspberrypi_register_pllb(rpi);
-		if (IS_ERR(hw)) {
-			dev_err(rpi->dev, "Failed to initialize pllb, %ld\n",
-				PTR_ERR(hw));
-			return hw;
-		}
-
-		return raspberrypi_register_pllb_arm(rpi);
-	}
-
 	data = devm_kzalloc(rpi->dev, sizeof(*data), GFP_KERNEL);
 	if (!data)
 		return ERR_PTR(-ENOMEM);
-- 
git-series 0.9.1

  parent reply index

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-15  8:40 [PATCH v5 00/27] clk: bcm: rpi: Add support for BCM2711 firmware clocks Maxime Ripard
2020-06-15  8:40 ` [PATCH v5 01/27] dt-bindings: arm: bcm: Convert BCM2835 firmware binding to YAML Maxime Ripard
2020-06-25  0:42   ` Stephen Boyd
2020-06-15  8:40 ` [PATCH v5 02/27] dt-bindings: clock: Add a binding for the RPi Firmware clocks Maxime Ripard
2020-06-25  0:42   ` Stephen Boyd
2020-06-15  8:40 ` [PATCH v5 03/27] firmware: rpi: Only create clocks device if we don't have a node for it Maxime Ripard
2020-06-25  0:42   ` Stephen Boyd
2020-06-15  8:40 ` [PATCH v5 04/27] clk: bcm: rpi: Allow the driver to be probed by DT Maxime Ripard
2020-06-25  0:42   ` Stephen Boyd
2020-06-15  8:40 ` [PATCH v5 05/27] clk: bcm: rpi: Statically init clk_init_data Maxime Ripard
2020-06-25  0:42   ` Stephen Boyd
2020-06-15  8:40 ` [PATCH v5 06/27] clk: bcm: rpi: Use clk_hw_register for pllb_arm Maxime Ripard
2020-06-25  0:42   ` Stephen Boyd
2020-06-15  8:40 ` [PATCH v5 07/27] clk: bcm: rpi: Remove global pllb_arm clock pointer Maxime Ripard
2020-06-25  0:42   ` Stephen Boyd
2020-06-15  8:40 ` [PATCH v5 08/27] clk: bcm: rpi: Make sure pllb_arm is removed Maxime Ripard
2020-06-25  0:42   ` Stephen Boyd
2020-06-15  8:40 ` [PATCH v5 09/27] clk: bcm: rpi: Remove pllb_arm_lookup global pointer Maxime Ripard
2020-06-25  0:42   ` Stephen Boyd
2020-06-25  0:44   ` Stephen Boyd
2020-06-15  8:40 ` [PATCH v5 10/27] clk: bcm: rpi: Switch to clk_hw_register_clkdev Maxime Ripard
2020-06-25  0:44   ` Stephen Boyd
2020-06-15  8:40 ` [PATCH v5 11/27] clk: bcm: rpi: Make sure the clkdev lookup is removed Maxime Ripard
2020-06-25  0:44   ` Stephen Boyd
2020-06-15  8:40 ` [PATCH v5 12/27] clk: bcm: rpi: Use CCF boundaries instead of rolling our own Maxime Ripard
2020-06-25  0:44   ` Stephen Boyd
2020-06-15  8:40 ` [PATCH v5 13/27] clk: bcm: rpi: Create a data structure for the clocks Maxime Ripard
2020-06-25  0:44   ` Stephen Boyd
2020-06-15  8:40 ` [PATCH v5 14/27] clk: bcm: rpi: Add clock id to data Maxime Ripard
2020-06-25  0:45   ` Stephen Boyd
2020-06-15  8:40 ` [PATCH v5 15/27] clk: bcm: rpi: Pass the clocks data to the firmware function Maxime Ripard
2020-06-25  0:45   ` Stephen Boyd
2020-06-15  8:40 ` [PATCH v5 16/27] clk: bcm: rpi: Rename is_prepared function Maxime Ripard
2020-06-25  0:45   ` Stephen Boyd
2020-06-15  8:40 ` [PATCH v5 17/27] clk: bcm: rpi: Split pllb clock hooks Maxime Ripard
2020-06-25  0:45   ` Stephen Boyd
2020-06-15  8:40 ` [PATCH v5 18/27] clk: bcm: rpi: Make the PLLB registration function return a clk_hw Maxime Ripard
2020-06-25  0:45   ` Stephen Boyd
2020-06-15  8:40 ` [PATCH v5 19/27] clk: bcm: rpi: Add DT provider for the clocks Maxime Ripard
2020-06-25  0:45   ` Stephen Boyd
2020-06-15  8:41 ` [PATCH v5 20/27] clk: bcm: rpi: Add an enum for the firmware clocks Maxime Ripard
2020-06-25  0:45   ` Stephen Boyd
2020-06-15  8:41 ` [PATCH v5 21/27] clk: bcm: rpi: Discover " Maxime Ripard
2020-06-25  0:45   ` Stephen Boyd
2020-06-15  8:41 ` [PATCH v5 22/27] clk: bcm: rpi: Give firmware clocks a name Maxime Ripard
2020-06-25  0:45   ` Stephen Boyd
2020-06-15  8:41 ` [PATCH v5 23/27] Revert "clk: bcm2835: remove pllb" Maxime Ripard
2020-06-25  0:45   ` Stephen Boyd
2020-06-15  8:41 ` [PATCH v5 24/27] ARM: dts: bcm2711: Add firmware clocks node Maxime Ripard
2020-06-25  8:16   ` Nicolas Saenz Julienne
2020-06-15  8:41 ` [PATCH v5 25/27] clk: bcm2835: Allow custom CCF flags for the PLLs Maxime Ripard
2020-06-25  0:46   ` Stephen Boyd
2020-06-15  8:41 ` [PATCH v5 26/27] clk: bcm2835: Don't cache the PLLB rate Maxime Ripard
2020-06-25  0:46   ` Stephen Boyd
2020-06-15  8:41 ` Maxime Ripard [this message]
2020-06-25  0:46   ` [PATCH v5 27/27] clk: bcm: rpi: Remove the quirks for the CPU clock Stephen Boyd
2020-06-19  9:37 ` [PATCH v5 00/27] clk: bcm: rpi: Add support for BCM2711 firmware clocks Stephen Boyd
2020-06-19  9:44   ` Nicolas Saenz Julienne
2020-06-19 23:57     ` Stephen Boyd
2020-06-20  0:20       ` Stephen Boyd
2020-06-25  0:40         ` Stephen Boyd
2020-06-19 11:52   ` Maxime Ripard
2020-06-19 23:57     ` Stephen Boyd
2020-06-25  1:15 ` Stephen Boyd

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