Re: [PATCH V2 11/13] arm64: dtsi: qcom: ipq5018: enable nodes required for multipd

[Manikanta Mylavarapu <quic_mmanikan@quicinc.com>]

On 5/30/2023 4:35 PM, Krzysztof Kozlowski wrote:
> On 22/05/2023 00:28, Manikanta Mylavarapu wrote:
>> Enable nodes required for multipd remoteproc bring up
> 
> Please use subject prefixes matching the subsystem. You can get them for
> example with `git log --oneline -- DIRECTORY_OR_FILE` on the directory
> your patch is touching.
> 
> It is "dts". Not "dtsi".
> 
Sure, I will update to 'dtsi'.

>>
>> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
>> ---
>> Changes in V2:
>> 	- Corrected syntax like alignmnet and kept nodes in sorted order.
>> 	- Covered entire TCSR region.
>> 	- Added 'firmware-name' property.
>>
>>   arch/arm64/boot/dts/qcom/ipq5018.dtsi | 140 ++++++++++++++++++++++++++
>>   1 file changed, 140 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
>> index 9f13d2dcdfd5..3772d54d89e4 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
>> @@ -85,6 +85,18 @@
>>   			reg = <0x0 0x4ac00000 0x0 0x200000>;
>>   			no-map;
>>   		};
>> +
>> +		q6_region: wcnss@4b000000 {
>> +			reg = <0x0 0x4b000000 0x0 0x1700000>;
>> +			no-map;
>> +		};
>> +
>> +		smem@4ab00000 {
>> +			compatible = "qcom,smem";
>> +			reg = <0x0 0x4ab00000 0x0 0x100000>;
>> +			hwlocks = <&tcsr_mutex 0>;
>> +			no-map;
>> +		};
>>   	};
>>
>>   	soc: soc@0 {
>> @@ -128,6 +140,12 @@
>>   			#power-domain-cells = <1>;
>>   		};
>>
>> +		tcsr_mutex: hwlock@1905000 {
>> +			compatible = "qcom,tcsr-mutex";
>> +			reg = <0x01905000 0x20000>;
>> +			#hwlock-cells = <1>;
>> +		};
>> +
>>   		sdhc_1: mmc@7804000 {
>>   			compatible = "qcom,ipq5018-sdhci", "qcom,sdhci-msm-v5";
>>   			reg = <0x7804000 0x1000>;
>> @@ -181,6 +199,14 @@
>>   			};
>>   		};
>>
>> +		apcs_glb: mailbox@b111000 {
>> +			compatible = "qcom,ipq5018-apcs-apps-global",
>> +				     "qcom,ipq6018-apcs-apps-global";
>> +			reg = <0x0b111000 0x1000>;
>> +			#clock-cells = <1>;
>> +			#mbox-cells = <1>;
>> +		};
>> +
>>   		timer@b120000 {
>>   			compatible = "arm,armv7-timer-mem";
>>   			reg = <0x0b120000 0x1000>;
>> @@ -238,6 +264,96 @@
>>   				status = "disabled";
>>   			};
>>   		};
>> +
>> +		q6v5_wcss: remoteproc@cd00000 {
>> +			compatible = "qcom,ipq5018-q6-mpd";
>> +			reg = <0x0cd00000 0x4040>;
>> +			firmware-name = "IPQ5018/q6_fw.mdt",
>> +					"IPQ5018/m3_fw.mdt",
>> +					"qcn6122/m3_fw.mdt";
>> +			interrupts-extended = <&intc GIC_SPI 291 IRQ_TYPE_EDGE_RISING>,
>> +					      <&wcss_smp2p_in 0 0>,
>> +					      <&wcss_smp2p_in 1 0>,
>> +					      <&wcss_smp2p_in 2 0>,
>> +					      <&wcss_smp2p_in 3 0>;
>> +			interrupt-names = "wdog",
>> +					  "fatal",
>> +					  "ready",
>> +					  "handover",
>> +					  "stop-ack";
>> +
>> +			qcom,smem-states = <&wcss_smp2p_out 0>,
>> +					   <&wcss_smp2p_out 1>;
>> +			qcom,smem-state-names = "shutdown",
>> +						"stop";
>> +			memory-region = <&q6_region>;
>> +
>> +			glink-edge {
>> +				interrupts = <GIC_SPI 179 IRQ_TYPE_EDGE_RISING>;
>> +				label = "rtr";
>> +				qcom,remote-pid = <1>;
>> +				mboxes = <&apcs_glb 8>;
>> +			};
>> +
>> +			pd-1 {
>> +				compatible = "qcom,ipq5018-wcss-ahb-mpd";
>> +				firmware-name = "IPQ5018/q6_fw.mdt";
>> +				interrupts-extended = <&wcss_smp2p_in 8 0>,
>> +						      <&wcss_smp2p_in 9 0>,
>> +						      <&wcss_smp2p_in 12 0>,
>> +						      <&wcss_smp2p_in 11 0>;
> 
> What "0" stands for?
> 
0 means IRQ_NONE. These are software interrupts (register write),
so we have configured to 0. I will replace 0 with IRQ_NONE.

Thanks & Regards,
Manikanta.

>> +				interrupt-names = "fatal",
>> +						  "ready",
> Best regards,
> Krzysztof
>