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From: Taniya Das <tdas@codeaurora.org>
To: Sibi Sankar <sibis@codeaurora.org>
Cc: Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	David Brown <david.brown@linaro.org>,
	Rajendra Nayak <rnayak@codeaurora.org>,
	linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
	Andy Gross <agross@kernel.org>,
	devicetree@vger.kernel.org, robh@kernel.org, robh+dt@kernel.org,
	linux-arm-msm-owner@vger.kernel.org
Subject: Re: [PATCH v2 3/3] clk: qcom: Add modem clock controller driver for SC7180
Date: Mon, 13 Jan 2020 15:34:28 +0530
Message-ID: <af34688b-656c-d6df-982a-ec7708c4d228@codeaurora.org> (raw)
In-Reply-To: <7e63d3a91264e7c237c4cb10508182bf@codeaurora.org>

Hi Sibi,

Thanks for your review.

On 12/27/2019 12:50 PM, Sibi Sankar wrote:
> Hey Taniya,
> 

>>  static const struct qcom_reset_map gcc_sc7180_resets[] = {
>> diff --git a/drivers/clk/qcom/mss-sc7180.c 
>> b/drivers/clk/qcom/mss-sc7180.c
>> new file mode 100644
>> index 0000000..24c38dc
>> --- /dev/null
>> +++ b/drivers/clk/qcom/mss-sc7180.c
>> @@ -0,0 +1,94 @@
>> +// SPDX-License-Identifier: GPL-2.0-only
>> +/*
>> + * Copyright (c) 2019, The Linux Foundation. All rights reserved.
>> + */
>> +
>> +#include <linux/clk-provider.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/module.h>
>> +#include <linux/of_address.h>
>> +#include <linux/regmap.h>
>> +
>> +#include <dt-bindings/clock/qcom,mss-sc7180.h>
>> +
>> +#include "clk-regmap.h"
>> +#include "clk-branch.h"
>> +#include "common.h"
>> +
>> +static struct clk_branch mss_axi_nav_clk = {
>> +    .halt_reg = 0xbc,
> 
> if we use the entire mpss_perph
> reg space it should be 0x20bc
> instead.
> 
>> +    .halt_check = BRANCH_HALT,
>> +    .clkr = {
>> +        .enable_reg = 0xbc,
> 
> 0x20bc
> 

yes, will take care in the next patch.

>> +        .enable_mask = BIT(0),
>> +        .hw.init = &(struct clk_init_data){
>> +            .name = "mss_axi_nav_clk",
>> +            .ops = &clk_branch2_ops,
>> +        },
>> +    },
>> +};
>> +
>> +static struct clk_branch mss_axi_crypto_clk = {
>> +    .halt_reg = 0xcc,
> 
> if we use the entire mpss_perph
> reg space it should be 0x20cc
> instead.
> 
>> +    .halt_check = BRANCH_HALT,
>> +    .clkr = {
>> +        .enable_reg = 0xcc,
> 
> 0x20cc
> 

same as above.

>> +        .enable_mask = BIT(0),
>> +        .hw.init = &(struct clk_init_data){
>> +            .name = "mss_axi_crypto_clk",
>> +            .ops = &clk_branch2_ops,
>> +        },
>> +    },
>> +};
>> +
>> +static struct regmap_config mss_regmap_config = {
>> +    .reg_bits    = 32,
>> +    .reg_stride    = 4,
>> +    .val_bits    = 32,
>> +    .fast_io    = true,
>> +};
>> +
>> +static struct clk_regmap *mss_sc7180_clocks[] = {
>> +    [MSS_AXI_CRYPTO_CLK] = &mss_axi_crypto_clk.clkr,
>> +    [MSS_AXI_NAV_CLK] = &mss_axi_nav_clk.clkr,
>> +};
>> +
>> +static const struct qcom_cc_desc mss_sc7180_desc = {
>> +    .config = &mss_regmap_config,
>> +    .clks = mss_sc7180_clocks,
>> +    .num_clks = ARRAY_SIZE(mss_sc7180_clocks),
>> +};
>> +
>> +static int mss_sc7180_probe(struct platform_device *pdev)
>> +{
>> +    return qcom_cc_probe(pdev, &mss_sc7180_desc);
> 
> Similar to turingcc-qcs404 and q6sstop-qcs404
> shouldn't we model the iface clk dependency
> here since  both the above clocks cant be turned
> on/off without it.
> 

Could we skip and proceed with the above for now?

>> +}
>> +
>> +static const struct of_device_id mss_sc7180_match_table[] = {
>> +    { .compatible = "qcom,sc7180-mss" },
>> +    { }
>> +};
>> +MODULE_DEVICE_TABLE(of, mss_sc7180_match_table);
>> +
>> +static struct platform_driver mss_sc7180_driver = {
>> +    .probe        = mss_sc7180_probe,
>> +    .driver        = {
>> +        .name        = "sc7180-mss",
>> +        .of_match_table = mss_sc7180_match_table,
>> +    },
>> +};
>> +
>> +static int __init mss_sc7180_init(void)
>> +{
>> +    return platform_driver_register(&mss_sc7180_driver);
>> +}
>> +subsys_initcall(mss_sc7180_init);
>> +
>> +static void __exit mss_sc7180_exit(void)
>> +{
>> +    platform_driver_unregister(&mss_sc7180_driver);
>> +}
>> +module_exit(mss_sc7180_exit);
>> +
>> +MODULE_DESCRIPTION("QTI MSS SC7180 Driver");
>> +MODULE_LICENSE("GPL v2");
>> -- 
>> Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member
>> of the Code Aurora Forum, hosted by the  Linux Foundation.
> 

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member
of Code Aurora Forum, hosted by The Linux Foundation.

--

  reply index

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-27  4:42 [PATCH v2 0/3] Add modem Clock controller (MSS CC) " Taniya Das
2019-12-27  4:42 ` [PATCH v2 1/3] dt-bindings: clock: Add YAML schemas for the QCOM MSS clock bindings Taniya Das
2019-12-27  7:01   ` Sibi Sankar
2020-01-13  9:56     ` Taniya Das
2020-01-04 21:36   ` Rob Herring
2020-01-13 10:00     ` Taniya Das
2020-01-13 16:21       ` Rob Herring
2019-12-27  4:42 ` [PATCH v2 2/3] dt-bindings: clock: Introduce QCOM Modem " Taniya Das
2019-12-27  4:42 ` [PATCH v2 3/3] clk: qcom: Add modem clock controller driver for SC7180 Taniya Das
2019-12-27  7:20   ` Sibi Sankar
2020-01-13 10:04     ` Taniya Das [this message]
2020-01-22 21:29   ` Doug Anderson
2019-12-30 18:02 ` [PATCH v2 0/3] Add modem Clock controller (MSS CC) " Stephen Boyd

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