From: <quic_vamslank@quicinc.com>
To: <agross@kernel.org>, <bjorn.andersson@linaro.org>,
<mturquette@baylibre.com>, <sboyd@kernel.org>,
<robh+dt@kernel.org>, <tglx@linutronix.de>, <maz@kernel.org>
Cc: <linux-arm-msm@vger.kernel.org>, <linux-clk@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
"Vamsi krishna Lanka" <quic_vamslank@quicinc.com>
Subject: [PATCH v2 5/6] clk: qcom: Add support for SDX65 RPMh clocks
Date: Thu, 22 Jul 2021 14:09:42 -0700 [thread overview]
Message-ID: <fed310806d011c704955306a9768512b0bcc7cd4.1626986805.git.quic_vamslank@quicinc.com> (raw)
In-Reply-To: <cover.1626986805.git.quic_vamslank@quicinc.com>
From: Vamsi krishna Lanka <quic_vamslank@quicinc.com>
Add support for clocks maintained by RPMh in SDX65 SoCs.
Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/clk/qcom/clk-rpmh.c | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
index 91dc390a583b..f3769b86e5d0 100644
--- a/drivers/clk/qcom/clk-rpmh.c
+++ b/drivers/clk/qcom/clk-rpmh.c
@@ -477,6 +477,32 @@ static const struct clk_rpmh_desc clk_rpmh_sm8250 = {
.num_clks = ARRAY_SIZE(sm8250_rpmh_clocks),
};
+DEFINE_CLK_RPMH_ARC(sdx65, bi_tcxo, bi_tcxo_ao, "xo.lvl", 0x3, 4);
+DEFINE_CLK_RPMH_VRM(sdx65, ln_bb_clk1, ln_bb_clk1_ao, "lnbclka1", 4);
+DEFINE_CLK_RPMH_VRM(sdx65, rf_clk4, rf_clk4_ao, "rfclka4", 1);
+
+static struct clk_hw *sdx65_rpmh_clocks[] = {
+ [RPMH_CXO_CLK] = &sdx65_bi_tcxo.hw,
+ [RPMH_CXO_CLK_A] = &sdx65_bi_tcxo_ao.hw,
+ [RPMH_LN_BB_CLK1] = &sdx65_ln_bb_clk1.hw,
+ [RPMH_LN_BB_CLK1_A] = &sdx65_ln_bb_clk1_ao.hw,
+ [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw,
+ [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw,
+ [RPMH_RF_CLK2] = &sdm845_rf_clk2.hw,
+ [RPMH_RF_CLK2_A] = &sdm845_rf_clk2_ao.hw,
+ [RPMH_RF_CLK3] = &sdm845_rf_clk3.hw,
+ [RPMH_RF_CLK3_A] = &sdm845_rf_clk3_ao.hw,
+ [RPMH_RF_CLK4] = &sdx65_rf_clk4.hw,
+ [RPMH_RF_CLK4_A] = &sdx65_rf_clk4_ao.hw,
+ [RPMH_IPA_CLK] = &sdm845_ipa.hw,
+ [RPMH_QPIC_CLK] = &sdx55_qpic_clk.hw,
+};
+
+static const struct clk_rpmh_desc clk_rpmh_sdx65 = {
+ .clks = sdx65_rpmh_clocks,
+ .num_clks = ARRAY_SIZE(sdx65_rpmh_clocks),
+};
+
DEFINE_CLK_RPMH_VRM(sm8350, div_clk1, div_clk1_ao, "divclka1", 2);
DEFINE_CLK_RPMH_VRM(sm8350, rf_clk4, rf_clk4_ao, "rfclka4", 1);
DEFINE_CLK_RPMH_VRM(sm8350, rf_clk5, rf_clk5_ao, "rfclka5", 1);
@@ -618,6 +644,7 @@ static const struct of_device_id clk_rpmh_match_table[] = {
{ .compatible = "qcom,sc8180x-rpmh-clk", .data = &clk_rpmh_sc8180x},
{ .compatible = "qcom,sdm845-rpmh-clk", .data = &clk_rpmh_sdm845},
{ .compatible = "qcom,sdx55-rpmh-clk", .data = &clk_rpmh_sdx55},
+ { .compatible = "qcom,sdx65-rpmh-clk", .data = &clk_rpmh_sdx65},
{ .compatible = "qcom,sm8150-rpmh-clk", .data = &clk_rpmh_sm8150},
{ .compatible = "qcom,sm8250-rpmh-clk", .data = &clk_rpmh_sm8250},
{ .compatible = "qcom,sm8350-rpmh-clk", .data = &clk_rpmh_sm8350},
--
2.32.0
next prev parent reply other threads:[~2021-07-22 21:10 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-22 21:09 [PATCH v2 0/6] Add Pdc, GCC and RPMh clock support for SDX65 quic_vamslank
2021-07-22 21:09 ` [PATCH v2 1/6] dt-bindings: clock: Add SDX65 GCC clock bindings quic_vamslank
2021-07-23 14:31 ` Rob Herring
2021-07-22 21:09 ` [PATCH v2 2/6] clk: qcom: Add new PLL type for SDX65 quic_vamslank
2021-07-30 0:35 ` Taniya Das
2021-07-30 2:39 ` Vinod Koul
2021-07-22 21:09 ` [PATCH v2 3/6] clk: qcom: Add SDX65 GCC support quic_vamslank
2021-07-22 21:09 ` [PATCH v2 4/6] dt-bindings: clock: Introduce RPMHCC bindings for SDX65 quic_vamslank
2021-07-29 20:07 ` Rob Herring
2021-07-22 21:09 ` quic_vamslank [this message]
2021-07-30 0:41 ` [PATCH v2 5/6] clk: qcom: Add support for SDX65 RPMh clocks Taniya Das
2021-07-22 21:09 ` [PATCH v2 6/6] dt-bindings: clock: Introduce pdc bindings for SDX65 quic_vamslank
2021-07-29 20:08 ` Rob Herring
2021-07-31 7:46 ` Stephen Boyd
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