From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2057.outbound.protection.outlook.com [40.107.236.57]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7AE892C9F for ; Fri, 8 Oct 2021 18:05:42 +0000 (UTC) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=BqfM1EsYngzkHM5EbS0lc/SG5//cD6gKY+cGky9HuXPn2iampL5bjdIyvH9MPmFggGmLbaJDPlXjj/CWSbzWg2GX8kOZmHyvh2GkNHAlKOLkvk4KOHUroxK8cUyoLRBGRtDtH9llx0et7JGZSKOYu/bVPZBcYW8U11oeOnRMvbCtdSU34H4ZqIs58NQQIsfbs3i4n7Fc9zF0F78bpiieCYs8xfwnzPagGctaCYgDg3vujHzMJUYMTdK3u6YQxddr78lSl+6V8YpSVIH99S/3qIei0gKdkPsoyFbAlLCOGUwuOHgZtYzsmZFoHc6jUy4ZqJhKL0CPIXpGUS7faWj25w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=iZgXeO0wzTUtfaoGLADCXDFc2DUXXLtxcVyzkZl3Dqo=; b=ne0L9pXKYjF/gqrHeZQ3KRmrQoTOtE2oP4wwFlw+Ah2YmpadSB3trnI0XxWmyF8SvODrPrLETAvVHt8qNBePI/9IhUflvYOC0/wYBYMmkfvxYb4K9DIb3FM4VnyT5FcIpRuQWSXL63+2uskebNVxuYdpsA9Vvx7uAS/a1Lvsao8j472MKbDcpmTZUQhHjmeWzjA4ZPYqbER8lGY9wRBcDtqzhUxTtLRkh6H7bItCZrVjVtOWsyth8I8vemeGzbjlI7Fgqjvffjqh+rtCi131eu74HUJuyuMIeoj7hdjq8M/TDDkh3kAPRv5HcnMfsCwzvngcZ3hdZT6cKr5RxCtIQg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=kernel.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=iZgXeO0wzTUtfaoGLADCXDFc2DUXXLtxcVyzkZl3Dqo=; b=SfSFaMFw1o8zR4Lv9ilV8LlUja7Uo3lmspqo0piNWmQcsf7mj2j/EYLN89s2divxtfaTRmr/9DTKn31B3gfnv582RfNGAaO4rTVS4Jljk0k+ENvzLtqj4bEXXLmOP90AQa4nVeozMbgQwGaVsSP63r4BOEi/QKq1IRBfG/F41LY= Received: from MWHPR15CA0050.namprd15.prod.outlook.com (2603:10b6:301:4c::12) by CH0PR12MB5139.namprd12.prod.outlook.com (2603:10b6:610:be::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4587.19; Fri, 8 Oct 2021 18:05:38 +0000 Received: from CO1NAM11FT048.eop-nam11.prod.protection.outlook.com (2603:10b6:301:4c:cafe::da) by MWHPR15CA0050.outlook.office365.com (2603:10b6:301:4c::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4587.18 via Frontend Transport; Fri, 8 Oct 2021 18:05:37 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; kernel.org; dkim=none (message not signed) header.d=none;kernel.org; dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1NAM11FT048.mail.protection.outlook.com (10.13.175.148) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.4587.18 via Frontend Transport; Fri, 8 Oct 2021 18:05:37 +0000 Received: from sbrijesh-desktop.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.8; Fri, 8 Oct 2021 13:05:34 -0500 From: Brijesh Singh To: , , , , , , CC: Thomas Gleixner , Ingo Molnar , Joerg Roedel , Tom Lendacky , "H. Peter Anvin" , Ard Biesheuvel , Paolo Bonzini , Sean Christopherson , "Vitaly Kuznetsov" , Jim Mattson , "Andy Lutomirski" , Dave Hansen , Sergio Lopez , Peter Gonda , "Peter Zijlstra" , Srinivas Pandruvada , David Rientjes , Dov Murik , Tobin Feldman-Fitzthum , Borislav Petkov , Michael Roth , Vlastimil Babka , "Kirill A . Shutemov" , Andi Kleen , "Dr . David Alan Gilbert" , , , , Brijesh Singh Subject: [PATCH v6 14/42] x86/sev: Register GHCB memory when SEV-SNP is active Date: Fri, 8 Oct 2021 13:04:25 -0500 Message-ID: <20211008180453.462291-15-brijesh.singh@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211008180453.462291-1-brijesh.singh@amd.com> References: <20211008180453.462291-1-brijesh.singh@amd.com> Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 94c36b73-d3e5-43ce-d6bd-08d98a863b56 X-MS-TrafficTypeDiagnostic: CH0PR12MB5139: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:3968; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: SwAqsLsYHP/Czps7/+X4RbhAOo0YNwRjzxnR6KtSwjbW6T1YaSljUH3cS2QT/oJ0DPfOGHp0BYQgCYKvrObtg1mqQewIa9ZWXuVqBbB5uhfF+TD4lvuVKEqA6POdUEDUf25DZJkC8AnoWykXWY8Y5tNsXSqIZ9hH0rMAYvudRqrbOlDf0kYEdUGapCX4h3a4OOWkAPVube2dEG7E3PmuETfdbaTXboJGPR2AWHZ+MxSetLiadWPUFJEexNguWOIguxc4WSPjcDN20/dV2a5CFINdrCxu8G89mqlXubkA5z8qunXoZZUY515CwmcaHM8WvUN8LypMozoMOIXSLcZ0eyWEv04BfR+BLHjtnwDsbNYbtFDWECCXy82mSSyBi8SDtDLUpD0SHVTK7BYO8P1v6qu9WpMg1jBJj0irUE/dihFcyXlyYWfo72sQ679COZLW9kUi9iwfqa3MC75Qf8LS0Aont0doL9exzosN3wv6RqOw+Du7riEtLaJGXzNUPko/1u9a5VzC3jL2r9jUjOCZym69YXHdDwoceUv1TI4WeWn0n8PMGqShvGUna5lzjtLHNMcuMxjH+PdK9wajIQXCNQ1XjfgNyqGEyRpmDxqUTQ+m3/rvOdL0dUe4CrdzW+ZWfX+6g8cx+S0g61EL31QeRqBScyV9kCMFgeBPGXdoJrvdhihQSolmFdOgwYDnlnTX/AWGxuytcIgZ4hn71a6tToKu90iXUJm4owiwCjlIDlG70infVmC8wi8c7+AF2Zlo X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(4636009)(36840700001)(46966006)(47076005)(356005)(44832011)(54906003)(70586007)(7406005)(86362001)(508600001)(316002)(7416002)(36860700001)(70206006)(186003)(81166007)(8676002)(16526019)(83380400001)(110136005)(26005)(4326008)(82310400003)(2616005)(1076003)(5660300002)(2906002)(36756003)(336012)(8936002)(426003)(7696005)(6666004)(2101003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Oct 2021 18:05:37.3904 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 94c36b73-d3e5-43ce-d6bd-08d98a863b56 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT048.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB5139 The SEV-SNP guest is required to perform GHCB GPA registration. This is because the hypervisor may prefer that a guest use a consistent and/or specific GPA for the GHCB associated with a vCPU. For more information, see the GHCB specification section GHCB GPA Registration. During the boot, init_ghcb() allocates a per-cpu GHCB page. On very first VC exception, the exception handler switch to using the per-cpu GHCB page allocated during the init_ghcb(). The GHCB page must be registered in the current vcpu context. Signed-off-by: Brijesh Singh --- arch/x86/kernel/sev.c | 124 +++++++++++++++++++++++++----------------- 1 file changed, 75 insertions(+), 49 deletions(-) diff --git a/arch/x86/kernel/sev.c b/arch/x86/kernel/sev.c index 2290fbcc1844..4c891d5d9651 100644 --- a/arch/x86/kernel/sev.c +++ b/arch/x86/kernel/sev.c @@ -77,6 +77,13 @@ struct sev_es_runtime_data { * is currently unsupported in SEV-ES guests. */ unsigned long dr7; + + /* + * SEV-SNP requires that the GHCB must be registered before using it. + * The flag below will indicate whether the GHCB is registered, if its + * not registered then sev_es_get_ghcb() will perform the registration. + */ + bool snp_ghcb_registered; }; struct ghcb_state { @@ -160,55 +167,6 @@ void noinstr __sev_es_ist_exit(void) this_cpu_write(cpu_tss_rw.x86_tss.ist[IST_INDEX_VC], *(unsigned long *)ist); } -/* - * Nothing shall interrupt this code path while holding the per-CPU - * GHCB. The backup GHCB is only for NMIs interrupting this path. - * - * Callers must disable local interrupts around it. - */ -static noinstr struct ghcb *__sev_get_ghcb(struct ghcb_state *state) -{ - struct sev_es_runtime_data *data; - struct ghcb *ghcb; - - WARN_ON(!irqs_disabled()); - - data = this_cpu_read(runtime_data); - ghcb = &data->ghcb_page; - - if (unlikely(data->ghcb_active)) { - /* GHCB is already in use - save its contents */ - - if (unlikely(data->backup_ghcb_active)) { - /* - * Backup-GHCB is also already in use. There is no way - * to continue here so just kill the machine. To make - * panic() work, mark GHCBs inactive so that messages - * can be printed out. - */ - data->ghcb_active = false; - data->backup_ghcb_active = false; - - instrumentation_begin(); - panic("Unable to handle #VC exception! GHCB and Backup GHCB are already in use"); - instrumentation_end(); - } - - /* Mark backup_ghcb active before writing to it */ - data->backup_ghcb_active = true; - - state->ghcb = &data->backup_ghcb; - - /* Backup GHCB content */ - *state->ghcb = *ghcb; - } else { - state->ghcb = NULL; - data->ghcb_active = true; - } - - return ghcb; -} - /* Needed in vc_early_forward_exception */ void do_early_exception(struct pt_regs *regs, int trapnr); @@ -464,6 +422,69 @@ static enum es_result vc_slow_virt_to_phys(struct ghcb *ghcb, struct es_em_ctxt /* Include code shared with pre-decompression boot stage */ #include "sev-shared.c" +static void snp_register_ghcb(struct sev_es_runtime_data *data, unsigned long paddr) +{ + if (data->snp_ghcb_registered) + return; + + snp_register_ghcb_early(paddr); + + data->snp_ghcb_registered = true; +} + +/* + * Nothing shall interrupt this code path while holding the per-CPU + * GHCB. The backup GHCB is only for NMIs interrupting this path. + * + * Callers must disable local interrupts around it. + */ +static noinstr struct ghcb *__sev_get_ghcb(struct ghcb_state *state) +{ + struct sev_es_runtime_data *data; + struct ghcb *ghcb; + + WARN_ON(!irqs_disabled()); + + data = this_cpu_read(runtime_data); + ghcb = &data->ghcb_page; + + if (unlikely(data->ghcb_active)) { + /* GHCB is already in use - save its contents */ + + if (unlikely(data->backup_ghcb_active)) { + /* + * Backup-GHCB is also already in use. There is no way + * to continue here so just kill the machine. To make + * panic() work, mark GHCBs inactive so that messages + * can be printed out. + */ + data->ghcb_active = false; + data->backup_ghcb_active = false; + + instrumentation_begin(); + panic("Unable to handle #VC exception! GHCB and Backup GHCB are already in use"); + instrumentation_end(); + } + + /* Mark backup_ghcb active before writing to it */ + data->backup_ghcb_active = true; + + state->ghcb = &data->backup_ghcb; + + /* Backup GHCB content */ + *state->ghcb = *ghcb; + } else { + state->ghcb = NULL; + data->ghcb_active = true; + } + + /* SEV-SNP guest requires that GHCB must be registered. */ + if (cc_platform_has(CC_ATTR_SEV_SNP)) + snp_register_ghcb(data, __pa(ghcb)); + + return ghcb; +} + static noinstr void __sev_put_ghcb(struct ghcb_state *state) { struct sev_es_runtime_data *data; @@ -650,6 +671,10 @@ static bool __init setup_ghcb(void) /* Alright - Make the boot-ghcb public */ boot_ghcb = &boot_ghcb_page; + /* SEV-SNP guest requires that GHCB GPA must be registered. */ + if (cc_platform_has(CC_ATTR_SEV_SNP)) + snp_register_ghcb_early(__pa(&boot_ghcb_page)); + return true; } @@ -739,6 +764,7 @@ static void __init init_ghcb(int cpu) data->ghcb_active = false; data->backup_ghcb_active = false; + data->snp_ghcb_registered = false; } void __init sev_es_init_vc_handling(void) -- 2.25.1