From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27AB9C433E3 for ; Mon, 29 Jun 2020 21:14:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1103B206A1 for ; Mon, 29 Jun 2020 21:14:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388120AbgF2VOr (ORCPT ); Mon, 29 Jun 2020 17:14:47 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:59524 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730076AbgF2S5D (ORCPT ); Mon, 29 Jun 2020 14:57:03 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 32AA9DD8EA924FDB0A4E; Mon, 29 Jun 2020 19:10:58 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.487.0; Mon, 29 Jun 2020 19:10:46 +0800 From: Yang Shen To: , CC: , , Subject: [PATCH 7/9] crypto: hisilicon/qm - fix VF not available after PF FLR Date: Mon, 29 Jun 2020 19:09:06 +0800 Message-ID: <1593428948-64634-8-git-send-email-shenyang39@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1593428948-64634-1-git-send-email-shenyang39@huawei.com> References: <1593428948-64634-1-git-send-email-shenyang39@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org From: Shukun Tan When PF FLR, the hardware will actively trigger the VF FLR. Configuration space of VF needs to be saved and restored to ensure that it is available after the PF FLR. Fixes: 7ce396fa12a9("crypto: hisilicon - add FLR support") Signed-off-by: Shukun Tan --- drivers/crypto/hisilicon/qm.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c index db816be..a441b3d 100644 --- a/drivers/crypto/hisilicon/qm.c +++ b/drivers/crypto/hisilicon/qm.c @@ -3334,6 +3334,9 @@ static int qm_vf_reset_prepare(struct hisi_qm *qm, continue; if (pci_physfn(virtfn) == pdev) { + /* save VFs PCIE BAR configuration */ + pci_save_state(virtfn); + ret = hisi_qm_stop(vf_qm, stop_reason); if (ret) goto stop_fail; @@ -3497,6 +3500,9 @@ static int qm_vf_reset_done(struct hisi_qm *qm) continue; if (pci_physfn(virtfn) == pdev) { + /* enable VFs PCIE BAR configuration */ + pci_restore_state(virtfn); + ret = qm_restart(vf_qm); if (ret) goto restart_fail; -- 2.7.4