From: Catalin Marinas <catalin.marinas@arm.com>
To: linux-arm-kernel@lists.infradead.org,
Jeremy Linton <jeremy.linton@arm.com>
Cc: Will Deacon <will@kernel.org>,
davem@davemloft.net, herbert@gondor.apana.org.au,
linux-kernel@vger.kernel.org, dave.martin@arm.com,
ardb@kernel.org, linux-crypto@vger.kernel.org,
broonie@kernel.org
Subject: Re: [PATCH v3] crypto: arm64: Use x16 with indirect branch to bti_c
Date: Tue, 6 Oct 2020 18:31:15 +0100 [thread overview]
Message-ID: <160200545502.18883.1273632867328038422.b4-ty@arm.com> (raw)
In-Reply-To: <20201006163326.2780619-1-jeremy.linton@arm.com>
On Tue, 6 Oct 2020 11:33:26 -0500, Jeremy Linton wrote:
> The AES code uses a 'br x7' as part of a function called by
> a macro. That branch needs a bti_j as a target. This results
> in a panic as seen below. Using x16 (or x17) with an indirect
> branch keeps the target bti_c.
>
> Bad mode in Synchronous Abort handler detected on CPU1, code 0x34000003 -- BTI
> CPU: 1 PID: 265 Comm: cryptomgr_test Not tainted 5.8.11-300.fc33.aarch64 #1
> pstate: 20400c05 (nzCv daif +PAN -UAO BTYPE=j-)
> pc : aesbs_encrypt8+0x0/0x5f0 [aes_neon_bs]
> lr : aesbs_xts_encrypt+0x48/0xe0 [aes_neon_bs]
> sp : ffff80001052b730
>
> [...]
Applied to arm64 (for-next/fixes), thanks!
[1/1] crypto: arm64: Use x16 with indirect branch to bti_c
https://git.kernel.org/arm64/c/39e4716caa59
--
Catalin
next prev parent reply other threads:[~2020-10-06 17:31 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-06 16:33 [BUG][PATCH v3] crypto: arm64: Use x16 with indirect branch to bti_c Jeremy Linton
2020-10-06 16:34 ` Ard Biesheuvel
2020-10-06 16:39 ` Mark Brown
2020-10-06 17:31 ` Catalin Marinas [this message]
2020-10-07 8:49 ` Dave Martin
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