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From: Andrey Smirnov <andrew.smirnov@gmail.com>
To: linux-crypto@vger.kernel.org
Cc: "Andrey Smirnov" <andrew.smirnov@gmail.com>,
	"Chris Spencer" <christopher.spencer@sea.co.uk>,
	"Cory Tusar" <cory.tusar@zii.aero>,
	"Chris Healy" <cphealy@gmail.com>,
	"Lucas Stach" <l.stach@pengutronix.de>,
	"Horia Geantă" <horia.geanta@nxp.com>,
	"Aymen Sghaier" <aymen.sghaier@nxp.com>,
	"Leonard Crestez" <leonard.crestez@nxp.com>,
	linux-kernel@vger.kernel.org
Subject: [PATCH v7 08/15] crypto: caam - share definition for MAX_SDLEN
Date: Mon, 12 Aug 2019 13:07:32 -0700
Message-ID: <20190812200739.30389-9-andrew.smirnov@gmail.com> (raw)
In-Reply-To: <20190812200739.30389-1-andrew.smirnov@gmail.com>

Both qi.h and cammalg_qi2.h seem to define identical versions of
MAX_SDLEN. Move it to desc_constr.h to avoid duplication.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Chris Spencer <christopher.spencer@sea.co.uk>
Cc: Cory Tusar <cory.tusar@zii.aero>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Horia Geantă <horia.geanta@nxp.com>
Cc: Aymen Sghaier <aymen.sghaier@nxp.com>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: linux-crypto@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
---
 drivers/crypto/caam/caamalg_qi2.h | 27 ---------------------------
 drivers/crypto/caam/desc_constr.h | 27 +++++++++++++++++++++++++++
 drivers/crypto/caam/qi.h          | 26 --------------------------
 3 files changed, 27 insertions(+), 53 deletions(-)

diff --git a/drivers/crypto/caam/caamalg_qi2.h b/drivers/crypto/caam/caamalg_qi2.h
index be5085451053..a5e0785917b5 100644
--- a/drivers/crypto/caam/caamalg_qi2.h
+++ b/drivers/crypto/caam/caamalg_qi2.h
@@ -90,33 +90,6 @@ struct dpaa2_caam_priv_per_cpu {
 	struct dpaa2_io *dpio;
 };
 
-/*
- * The CAAM QI hardware constructs a job descriptor which points
- * to shared descriptor (as pointed by context_a of FQ to CAAM).
- * When the job descriptor is executed by deco, the whole job
- * descriptor together with shared descriptor gets loaded in
- * deco buffer which is 64 words long (each 32-bit).
- *
- * The job descriptor constructed by QI hardware has layout:
- *
- *	HEADER		(1 word)
- *	Shdesc ptr	(1 or 2 words)
- *	SEQ_OUT_PTR	(1 word)
- *	Out ptr		(1 or 2 words)
- *	Out length	(1 word)
- *	SEQ_IN_PTR	(1 word)
- *	In ptr		(1 or 2 words)
- *	In length	(1 word)
- *
- * The shdesc ptr is used to fetch shared descriptor contents
- * into deco buffer.
- *
- * Apart from shdesc contents, the total number of words that
- * get loaded in deco buffer are '8' or '11'. The remaining words
- * in deco buffer can be used for storing shared descriptor.
- */
-#define MAX_SDLEN	((CAAM_DESC_BYTES_MAX - DESC_JOB_IO_LEN) / CAAM_CMD_SZ)
-
 /* Length of a single buffer in the QI driver memory cache */
 #define CAAM_QI_MEMCACHE_SIZE	512
 
diff --git a/drivers/crypto/caam/desc_constr.h b/drivers/crypto/caam/desc_constr.h
index 5988a26a2441..c364f9a94046 100644
--- a/drivers/crypto/caam/desc_constr.h
+++ b/drivers/crypto/caam/desc_constr.h
@@ -18,6 +18,33 @@
 #define CAAM_DESC_BYTES_MAX (CAAM_CMD_SZ * MAX_CAAM_DESCSIZE)
 #define DESC_JOB_IO_LEN (CAAM_CMD_SZ * 5 + CAAM_PTR_SZ * 3)
 
+/*
+ * The CAAM QI hardware constructs a job descriptor which points
+ * to shared descriptor (as pointed by context_a of FQ to CAAM).
+ * When the job descriptor is executed by deco, the whole job
+ * descriptor together with shared descriptor gets loaded in
+ * deco buffer which is 64 words long (each 32-bit).
+ *
+ * The job descriptor constructed by QI hardware has layout:
+ *
+ *	HEADER		(1 word)
+ *	Shdesc ptr	(1 or 2 words)
+ *	SEQ_OUT_PTR	(1 word)
+ *	Out ptr		(1 or 2 words)
+ *	Out length	(1 word)
+ *	SEQ_IN_PTR	(1 word)
+ *	In ptr		(1 or 2 words)
+ *	In length	(1 word)
+ *
+ * The shdesc ptr is used to fetch shared descriptor contents
+ * into deco buffer.
+ *
+ * Apart from shdesc contents, the total number of words that
+ * get loaded in deco buffer are '8' or '11'. The remaining words
+ * in deco buffer can be used for storing shared descriptor.
+ */
+#define MAX_SDLEN	((CAAM_DESC_BYTES_MAX - DESC_JOB_IO_LEN) / CAAM_CMD_SZ)
+
 #ifdef DEBUG
 #define PRINT_POS do { printk(KERN_DEBUG "%02d: %s\n", desc_len(desc),\
 			      &__func__[sizeof("append")]); } while (0)
diff --git a/drivers/crypto/caam/qi.h b/drivers/crypto/caam/qi.h
index f93c9c7ed430..db0549549e3b 100644
--- a/drivers/crypto/caam/qi.h
+++ b/drivers/crypto/caam/qi.h
@@ -14,32 +14,6 @@
 #include "desc.h"
 #include "desc_constr.h"
 
-/*
- * CAAM hardware constructs a job descriptor which points to a shared descriptor
- * (as pointed by context_a of to-CAAM FQ).
- * When the job descriptor is executed by DECO, the whole job descriptor
- * together with shared descriptor gets loaded in DECO buffer, which is
- * 64 words (each 32-bit) long.
- *
- * The job descriptor constructed by CAAM hardware has the following layout:
- *
- *	HEADER		(1 word)
- *	Shdesc ptr	(1 or 2 words)
- *	SEQ_OUT_PTR	(1 word)
- *	Out ptr		(1 or 2 words)
- *	Out length	(1 word)
- *	SEQ_IN_PTR	(1 word)
- *	In ptr		(1 or 2 words)
- *	In length	(1 word)
- *
- * The shdesc ptr is used to fetch shared descriptor contents into DECO buffer.
- *
- * Apart from shdesc contents, the total number of words that get loaded in DECO
- * buffer are '8' or '11'. The remaining words in DECO buffer can be used for
- * storing shared descriptor.
- */
-#define MAX_SDLEN	((CAAM_DESC_BYTES_MAX - DESC_JOB_IO_LEN) / CAAM_CMD_SZ)
-
 /* Length of a single buffer in the QI driver memory cache */
 #define CAAM_QI_MEMCACHE_SIZE	768
 
-- 
2.21.0


  parent reply index

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-12 20:07 [PATCH v7 00/15] crypto: caam - Add i.MX8MQ support Andrey Smirnov
2019-08-12 20:07 ` [PATCH v7 01/15] crypto: caam - move DMA mask selection into a function Andrey Smirnov
2019-08-12 20:07 ` [PATCH v7 02/15] crypto: caam - simplfy clock initialization Andrey Smirnov
2019-08-12 20:07 ` [PATCH v7 03/15] crypto: caam - convert caam_jr_init() to use devres Andrey Smirnov
2019-08-12 20:07 ` [PATCH v7 04/15] crypto: caam - request JR IRQ as the last step Andrey Smirnov
2019-08-12 20:07 ` [PATCH v7 05/15] crytpo: caam - make use of iowrite64*_hi_lo in wr_reg64 Andrey Smirnov
2019-08-12 20:07 ` [PATCH v7 06/15] crypto: caam - use ioread64*_hi_lo in rd_reg64 Andrey Smirnov
2019-08-12 20:07 ` [PATCH v7 07/15] crypto: caam - drop 64-bit only wr/rd_reg64() Andrey Smirnov
2019-08-12 20:07 ` Andrey Smirnov [this message]
2019-08-12 20:07 ` [PATCH v7 09/15] crypto: caam - make CAAM_PTR_SZ dynamic Andrey Smirnov
2019-08-12 20:07 ` [PATCH v7 10/15] crypto: caam - move cpu_to_caam_dma() selection to runtime Andrey Smirnov
2019-08-12 20:07 ` [PATCH v7 11/15] crypto: caam - drop explicit usage of struct jr_outentry Andrey Smirnov
2019-08-12 20:07 ` [PATCH v7 12/15] crypto: caam - don't hardcode inpentry size Andrey Smirnov
2019-08-12 20:07 ` [PATCH v7 13/15] crypto: caam - force DMA address to 32-bit on 64-bit i.MX SoCs Andrey Smirnov
2019-08-12 20:07 ` [PATCH v7 14/15] crypto: caam - always select job ring via RSR on i.MX8MQ Andrey Smirnov
2019-08-12 20:07 ` [PATCH v7 15/15] crypto: caam - add clock entry for i.MX8MQ Andrey Smirnov
2019-08-13 13:59 ` [PATCH v7 00/15] crypto: caam - Add i.MX8MQ support Horia Geanta
2019-08-13 18:51   ` Andrey Smirnov
2019-08-14 10:26     ` Horia Geanta

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