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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id s69sm2974728otb.4.2020.05.11.14.53.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 May 2020 14:53:45 -0700 (PDT) Received: (nullmailer pid 13339 invoked by uid 1000); Mon, 11 May 2020 21:53:43 -0000 Date: Mon, 11 May 2020 16:53:43 -0500 From: Rob Herring To: Tero Kristo Cc: herbert@gondor.apana.org.au, davem@davemloft.net, linux-crypto@vger.kernel.org, Keerthy , devicetree@vger.kernel.org Subject: Re: [PATCHv2 1/7] dt-bindings: crypto: Add TI SA2UL crypto accelerator documentation Message-ID: <20200511215343.GA10123@bogus> References: <20200424164430.3288-1-t-kristo@ti.com> <20200424164430.3288-2-t-kristo@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200424164430.3288-2-t-kristo@ti.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org On Fri, Apr 24, 2020 at 07:44:24PM +0300, Tero Kristo wrote: > From: Keerthy > > The Security Accelerator Ultra Lite (SA2UL) subsystem provides hardware > cryptographic acceleration for the following use cases: > > * Encryption and authentication for secure boot > * Encryption and authentication of content in applications > requiring DRM (digital rights management) and > content/asset protection > > SA2UL provides support for number of different cryptographic algorithms > including SHA1, SHA256, SHA512, AES, 3DES, and various combinations of > the previous for AEAD use. > > Cc: Rob Herring > Cc: devicetree@vger.kernel.org > Signed-off-by: Keerthy > [t-kristo@ti.com: converted documentation to yaml] > Signed-off-by: Tero Kristo > --- > .../devicetree/bindings/crypto/ti,sa2ul.yaml | 76 +++++++++++++++++++ > 1 file changed, 76 insertions(+) > create mode 100644 Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml > > diff --git a/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml b/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml > new file mode 100644 > index 000000000000..27bb3a7e2b87 > --- /dev/null > +++ b/Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml > @@ -0,0 +1,76 @@ > +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/crypto/ti,sa2ul.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: K3 SoC SA2UL crypto module > + > +maintainers: > + - Tero Kristo > + > +properties: > + compatible: > + enum: > + - ti,j721e-sa2ul > + - ti,am654-sa2ul > + > + reg: > + maxItems: 1 > + > + power-domains: > + maxItems: 1 > + > + dmas: > + items: > + - description: TX DMA Channel > + - description: RX DMA Channel #1 > + - description: RX DMA Channel #2 > + > + dma-names: > + items: > + - const: tx > + - const: rx1 > + - const: rx2 > + > + dma-coherent: true > + > + "#address-cells": > + const: 2 > + > + "#size-cells": > + const: 2 > + > + ranges: > + description: > + Address translation for the possible RNG child node for SA2UL > + > +patternProperties: > + "^rng@[a-lf0-9]+$": a-l? > + type: object > + description: > + Child RNG node for SA2UL Does this child node have a binding? > + > +required: > + - compatible > + - reg > + - power-domains > + - dmas > + - dma-names > + - dma-coherent > + > +additionalProperties: false > + > +examples: > + - | > + #include > + > + main_crypto: crypto@4e00000 { > + compatible = "ti,j721-sa2ul"; > + reg = <0x0 0x4e00000 0x0 0x1200>; > + power-domains = <&k3_pds 264 TI_SCI_PD_EXCLUSIVE>; > + dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>, > + <&main_udmap 0x4001>; > + dma-names = "tx", "rx1", "rx2"; > + dma-coherent; > + }; > -- > 2.17.1 > > -- > Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. 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