[PATCH v2 0/5] hwrng: add support for i.MX6 rngb

[PATCH v2 0/5] hwrng: add support for i.MX6 rngb

[Horia Geantă]

Add support for RNGB found in some i.MX6 SoCs (6SL, 6SLL, 6ULL, 6ULZ),
based on RNGC driver (drivers/char/hw_random/imx-rngc.c).

This driver claims support also for RNGB (besides RNGC),
and is currently used only by i.MX25.

Note:

Several NXP SoC from QorIQ family (P1010, P1023, P4080, P3041, P5020)
also have a RNGB, however it's part of the CAAM
(Cryptograhic Accelerator and Assurance Module) crypto accelerator.
In this case, RNGB is managed in the caam driver
(drivers/crypto/caam/), since it's tightly related to
the caam "job ring" interface, not to mention CAAM internally relying on
RNGB as source of randomness.

On the other hand, the i.MX6 SoCs with RNGB have a DCP
(Data Co-Processor) crypto accelerator and this block and RNGB
are independent.

Changelog:
-update rngb DT binding with compatible strings for i.MX6 SoCs

Horia Geantă (5):
  dt-bindings: rng: add Freescale RNGB compatibles for i.MX6 SoCs
  ARM: dts: imx6sl: fix rng node
  ARM: dts: imx6sll: add rng
  ARM: dts: imx6ull: add rng
  hwrng: imx-rngc: enable driver for i.MX6

 Documentation/devicetree/bindings/rng/imx-rng.txt | 3 +++
 arch/arm/boot/dts/imx6sl.dtsi                     | 2 ++
 arch/arm/boot/dts/imx6sll.dtsi                    | 7 +++++++
 arch/arm/boot/dts/imx6ull.dtsi                    | 7 +++++++
 drivers/char/hw_random/Kconfig                    | 2 +-
 drivers/char/hw_random/imx-rngc.c                 | 3 +++
 6 files changed, 23 insertions(+), 1 deletion(-)

-- 
2.17.1

[PATCH v2 1/5] dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs

[Horia Geantă]

RNGB block is found in some i.MX6 SoCs - 6SL, 6SLL, 6ULL, 6ULZ.
Add corresponding compatible strings.

Note:

Several NXP SoC from QorIQ family (P1010, P1023, P4080, P3041, P5020)
also have a RNGB, however it's part of the CAAM
(Cryptograhic Accelerator and Assurance Module) crypto accelerator.
In this case, RNGB is managed in the caam driver
(drivers/crypto/caam/), since it's tightly related to
the caam "job ring" interface, not to mention CAAM internally relying on
RNGB as source of randomness.

On the other hand, the i.MX6 SoCs with RNGB have a DCP
(Data Co-Processor) crypto accelerator and this block and RNGB
are independent.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
---
 Documentation/devicetree/bindings/rng/imx-rng.txt | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/rng/imx-rng.txt b/Documentation/devicetree/bindings/rng/imx-rng.txt
index 405c2b00ccb0..eb227db9e684 100644
--- a/Documentation/devicetree/bindings/rng/imx-rng.txt
+++ b/Documentation/devicetree/bindings/rng/imx-rng.txt
@@ -5,6 +5,9 @@ Required properties:
                "fsl,imx21-rnga"
                "fsl,imx31-rnga" (backward compatible with "fsl,imx21-rnga")
                "fsl,imx25-rngb"
+               "fsl,imx6sl-rngb"
+               "fsl,imx6sll-rngb"
+               "fsl,imx6ull-rngb"
                "fsl,imx35-rngc"
 - reg : offset and length of the register set of this block
 - interrupts : the interrupt number for the RNG block
-- 
2.17.1

[PATCH v2 2/5] ARM: dts: imx6sl: fix rng node

[Horia Geantă]

rng DT node was added without a compatible string.

i.MX driver for RNGC (drivers/char/hw_random/imx-rngc.c) also claims
support for RNGB, and is currently used for i.MX25.

Let's use this driver also for RNGB block in i.MX6SL.

Fixes: e29fe21cff96 ("ARM: dts: add device tree source for imx6sl SoC")
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
---
 arch/arm/boot/dts/imx6sl.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 911d8cf77f2c..0339a46fa71c 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -939,8 +939,10 @@
 			};
 
 			rngb: rngb@21b4000 {
+				compatible = "fsl,imx6sl-rngb", "fsl,imx25-rngb";
 				reg = <0x021b4000 0x4000>;
 				interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6SL_CLK_DUMMY>;
 			};
 
 			weim: weim@21b8000 {
-- 
2.17.1

[PATCH v2 3/5] ARM: dts: imx6sll: add rng

[Horia Geantă]

Add node for the RNGB block.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
---
 arch/arm/boot/dts/imx6sll.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi
index edd3abb9a9f1..1c5dbccca013 100644
--- a/arch/arm/boot/dts/imx6sll.dtsi
+++ b/arch/arm/boot/dts/imx6sll.dtsi
@@ -786,6 +786,13 @@
 				clocks = <&clks IMX6SLL_CLK_MMDC_P0_IPG>;
 			};
 
+			rngb: rng@21b4000 {
+				compatible = "fsl,imx6sll-rngb", "fsl,imx25-rngb";
+				reg = <0x021b4000 0x4000>;
+				interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6SLL_CLK_DUMMY>;
+			};
+
 			ocotp: ocotp-ctrl@21bc000 {
 				#address-cells = <1>;
 				#size-cells = <1>;
-- 
2.17.1

[PATCH v2 4/5] ARM: dts: imx6ull: add rng

[Horia Geantă]

Add node for the RNGB block.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
---
 arch/arm/boot/dts/imx6ull.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/imx6ull.dtsi b/arch/arm/boot/dts/imx6ull.dtsi
index fcde7f77ae42..9bf67490ac49 100644
--- a/arch/arm/boot/dts/imx6ull.dtsi
+++ b/arch/arm/boot/dts/imx6ull.dtsi
@@ -68,6 +68,13 @@
 				clock-names = "dcp";
 			};
 
+			rngb: rng@2284000 {
+				compatible = "fsl,imx6ull-rngb", "fsl,imx25-rngb";
+				reg = <0x02284000 0x4000>;
+				interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&clks IMX6UL_CLK_DUMMY>;
+			};
+
 			iomuxc_snvs: iomuxc-snvs@2290000 {
 				compatible = "fsl,imx6ull-iomuxc-snvs";
 				reg = <0x02290000 0x4000>;
-- 
2.17.1

[PATCH v2 5/5] hwrng: imx-rngc: enable driver for i.MX6

[Horia Geantă]

i.MX6 SL, SLL, ULL, ULZ SoCs have an RNGB block.

Since imx-rngc driver supports also rngb,
let's enable it for these SoCs too.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
---
 drivers/char/hw_random/Kconfig    | 2 +-
 drivers/char/hw_random/imx-rngc.c | 3 +++
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index 0ad17efc96df..53f6a7e4392f 100644
--- a/drivers/char/hw_random/Kconfig
+++ b/drivers/char/hw_random/Kconfig
@@ -245,7 +245,7 @@ config HW_RANDOM_MXC_RNGA
 config HW_RANDOM_IMX_RNGC
 	tristate "Freescale i.MX RNGC Random Number Generator"
 	depends on HAS_IOMEM && HAVE_CLK
-	depends on SOC_IMX25 || COMPILE_TEST
+	depends on SOC_IMX25 || SOC_IMX6SL || SOC_IMX6SLL || SOC_IMX6UL || COMPILE_TEST
 	default HW_RANDOM
 	help
 	  This driver provides kernel-side support for the Random Number
diff --git a/drivers/char/hw_random/imx-rngc.c b/drivers/char/hw_random/imx-rngc.c
index 9c47e431ce90..84576d2fbf8c 100644
--- a/drivers/char/hw_random/imx-rngc.c
+++ b/drivers/char/hw_random/imx-rngc.c
@@ -350,6 +350,9 @@ static SIMPLE_DEV_PM_OPS(imx_rngc_pm_ops, imx_rngc_suspend, imx_rngc_resume);
 
 static const struct of_device_id imx_rngc_dt_ids[] = {
 	{ .compatible = "fsl,imx25-rngb", .data = NULL, },
+	{ .compatible = "fsl,imx6sl-rngb", .data = NULL, },
+	{ .compatible = "fsl,imx6sll-rngb", .data = NULL, },
+	{ .compatible = "fsl,imx6ull-rngb", .data = NULL, },
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, imx_rngc_dt_ids);
-- 
2.17.1

Re: [PATCH v2 5/5] hwrng: imx-rngc: enable driver for i.MX6

[Martin Kaiser]

Thus wrote Horia Geantă (horia.geanta@nxp.com):

> i.MX6 SL, SLL, ULL, ULZ SoCs have an RNGB block.

> Since imx-rngc driver supports also rngb,
> let's enable it for these SoCs too.

> Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
> ---
>  drivers/char/hw_random/Kconfig    | 2 +-
>  drivers/char/hw_random/imx-rngc.c | 3 +++
>  2 files changed, 4 insertions(+), 1 deletion(-)

> diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
> index 0ad17efc96df..53f6a7e4392f 100644
> --- a/drivers/char/hw_random/Kconfig
> +++ b/drivers/char/hw_random/Kconfig
> @@ -245,7 +245,7 @@ config HW_RANDOM_MXC_RNGA
>  config HW_RANDOM_IMX_RNGC
>  	tristate "Freescale i.MX RNGC Random Number Generator"
>  	depends on HAS_IOMEM && HAVE_CLK
> -	depends on SOC_IMX25 || COMPILE_TEST
> +	depends on SOC_IMX25 || SOC_IMX6SL || SOC_IMX6SLL || SOC_IMX6UL || COMPILE_TEST
>  	default HW_RANDOM
>  	help
>  	  This driver provides kernel-side support for the Random Number
> diff --git a/drivers/char/hw_random/imx-rngc.c b/drivers/char/hw_random/imx-rngc.c
> index 9c47e431ce90..84576d2fbf8c 100644
> --- a/drivers/char/hw_random/imx-rngc.c
> +++ b/drivers/char/hw_random/imx-rngc.c
> @@ -350,6 +350,9 @@ static SIMPLE_DEV_PM_OPS(imx_rngc_pm_ops, imx_rngc_suspend, imx_rngc_resume);

>  static const struct of_device_id imx_rngc_dt_ids[] = {
>  	{ .compatible = "fsl,imx25-rngb", .data = NULL, },
> +	{ .compatible = "fsl,imx6sl-rngb", .data = NULL, },
> +	{ .compatible = "fsl,imx6sll-rngb", .data = NULL, },
> +	{ .compatible = "fsl,imx6ull-rngb", .data = NULL, },
>  	{ /* sentinel */ }
>  };
>  MODULE_DEVICE_TABLE(of, imx_rngc_dt_ids);
> -- 
> 2.17.1

Reviewed-by: Martin Kaiser <martin@kaiser.cx>

Re: [PATCH v2 4/5] ARM: dts: imx6ull: add rng

[Marco Felsch]

On 20-06-21 17:56, Horia Geantă wrote:
> Add node for the RNGB block.
> 
> Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
> ---

Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> 

Re: [PATCH v2 5/5] hwrng: imx-rngc: enable driver for i.MX6

[Marco Felsch]

On 20-06-21 17:56, Horia Geantă wrote:
> i.MX6 SL, SLL, ULL, ULZ SoCs have an RNGB block.
> 
> Since imx-rngc driver supports also rngb,
> let's enable it for these SoCs too.
> 
> Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
> ---

Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> 

Re: [PATCH v2 1/5] dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs

[Rob Herring]

On Sun, Jun 21, 2020 at 05:56:54PM +0300, Horia Geantă wrote:
> RNGB block is found in some i.MX6 SoCs - 6SL, 6SLL, 6ULL, 6ULZ.
> Add corresponding compatible strings.
> 
> Note:
> 
> Several NXP SoC from QorIQ family (P1010, P1023, P4080, P3041, P5020)
> also have a RNGB, however it's part of the CAAM
> (Cryptograhic Accelerator and Assurance Module) crypto accelerator.
> In this case, RNGB is managed in the caam driver
> (drivers/crypto/caam/), since it's tightly related to
> the caam "job ring" interface, not to mention CAAM internally relying on
> RNGB as source of randomness.
> 
> On the other hand, the i.MX6 SoCs with RNGB have a DCP
> (Data Co-Processor) crypto accelerator and this block and RNGB
> are independent.
> 
> Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
> ---
>  Documentation/devicetree/bindings/rng/imx-rng.txt | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/rng/imx-rng.txt b/Documentation/devicetree/bindings/rng/imx-rng.txt
> index 405c2b00ccb0..eb227db9e684 100644
> --- a/Documentation/devicetree/bindings/rng/imx-rng.txt
> +++ b/Documentation/devicetree/bindings/rng/imx-rng.txt
> @@ -5,6 +5,9 @@ Required properties:
>                 "fsl,imx21-rnga"
>                 "fsl,imx31-rnga" (backward compatible with "fsl,imx21-rnga")
>                 "fsl,imx25-rngb"
> +               "fsl,imx6sl-rngb"
> +               "fsl,imx6sll-rngb"
> +               "fsl,imx6ull-rngb"

These are all different? IOW, no fallback compatible?

>                 "fsl,imx35-rngc"
>  - reg : offset and length of the register set of this block
>  - interrupts : the interrupt number for the RNG block
> -- 
> 2.17.1
> 

Re: [PATCH v2 1/5] dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs

[Horia Geantă]

On 7/14/2020 3:03 AM, Rob Herring wrote:
> On Sun, Jun 21, 2020 at 05:56:54PM +0300, Horia Geantă wrote:
>> RNGB block is found in some i.MX6 SoCs - 6SL, 6SLL, 6ULL, 6ULZ.
>> Add corresponding compatible strings.
>>
>> Note:
>>
>> Several NXP SoC from QorIQ family (P1010, P1023, P4080, P3041, P5020)
>> also have a RNGB, however it's part of the CAAM
>> (Cryptograhic Accelerator and Assurance Module) crypto accelerator.
>> In this case, RNGB is managed in the caam driver
>> (drivers/crypto/caam/), since it's tightly related to
>> the caam "job ring" interface, not to mention CAAM internally relying on
>> RNGB as source of randomness.
>>
>> On the other hand, the i.MX6 SoCs with RNGB have a DCP
>> (Data Co-Processor) crypto accelerator and this block and RNGB
>> are independent.
>>
>> Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
>> ---
>>  Documentation/devicetree/bindings/rng/imx-rng.txt | 3 +++
>>  1 file changed, 3 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/rng/imx-rng.txt b/Documentation/devicetree/bindings/rng/imx-rng.txt
>> index 405c2b00ccb0..eb227db9e684 100644
>> --- a/Documentation/devicetree/bindings/rng/imx-rng.txt
>> +++ b/Documentation/devicetree/bindings/rng/imx-rng.txt
>> @@ -5,6 +5,9 @@ Required properties:
>>                 "fsl,imx21-rnga"
>>                 "fsl,imx31-rnga" (backward compatible with "fsl,imx21-rnga")
>>                 "fsl,imx25-rngb"
>> +               "fsl,imx6sl-rngb"
>> +               "fsl,imx6sll-rngb"
>> +               "fsl,imx6ull-rngb"
> 
> These are all different? IOW, no fallback compatible?
> 
They are compatible with "fsl,imx25-rngb".
I will clarify this in the binding in v3.

Thanks,
Horia