From: Tudor Ambarus <tudor.ambarus@microchip.com>
To: <herbert@gondor.apana.org.au>
Cc: <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
<ludovic.desroches@microchip.com>, <linux-crypto@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>,
"Tudor Ambarus" <tudor.ambarus@microchip.com>
Subject: [PATCH 1/9] crypto: atmel-tdes: Clarify how tdes dev gets allocated to the tfm
Date: Tue, 20 Jul 2021 11:55:27 +0300 [thread overview]
Message-ID: <20210720085535.141486-2-tudor.ambarus@microchip.com> (raw)
In-Reply-To: <20210720085535.141486-1-tudor.ambarus@microchip.com>
The tdes dev gets allocated to the tfm at alg->init time, there's no
need to overwrite the pointer to tdes_dd afterwards.
There's a single IP per SoC anyway, the first entry from the
atmel_tdes.dev_list is chosen without counting for tfms for example,
in case one thinks of an even distribution of tfms across the TDES
IPs: there's only one. At alg->init time the ctx->dd should already
be NULL, there's no need to check its value before requesting for a
tdes dev.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
drivers/crypto/atmel-tdes.c | 28 +++++++++-------------------
1 file changed, 9 insertions(+), 19 deletions(-)
diff --git a/drivers/crypto/atmel-tdes.c b/drivers/crypto/atmel-tdes.c
index 6f01c51e3c37..dda70dbe0838 100644
--- a/drivers/crypto/atmel-tdes.c
+++ b/drivers/crypto/atmel-tdes.c
@@ -196,23 +196,15 @@ static void atmel_tdes_write_n(struct atmel_tdes_dev *dd, u32 offset,
atmel_tdes_write(dd, offset, *value);
}
-static struct atmel_tdes_dev *atmel_tdes_find_dev(struct atmel_tdes_ctx *ctx)
+static struct atmel_tdes_dev *atmel_tdes_dev_alloc(void)
{
- struct atmel_tdes_dev *tdes_dd = NULL;
- struct atmel_tdes_dev *tmp;
+ struct atmel_tdes_dev *tdes_dd;
spin_lock_bh(&atmel_tdes.lock);
- if (!ctx->dd) {
- list_for_each_entry(tmp, &atmel_tdes.dev_list, list) {
- tdes_dd = tmp;
- break;
- }
- ctx->dd = tdes_dd;
- } else {
- tdes_dd = ctx->dd;
- }
+ /* One TDES IP per SoC. */
+ tdes_dd = list_first_entry_or_null(&atmel_tdes.dev_list,
+ struct atmel_tdes_dev, list);
spin_unlock_bh(&atmel_tdes.lock);
-
return tdes_dd;
}
@@ -646,7 +638,6 @@ static int atmel_tdes_handle_queue(struct atmel_tdes_dev *dd,
rctx->mode &= TDES_FLAGS_MODE_MASK;
dd->flags = (dd->flags & ~TDES_FLAGS_MODE_MASK) | rctx->mode;
dd->ctx = ctx;
- ctx->dd = dd;
err = atmel_tdes_write_ctrl(dd);
if (!err)
@@ -897,14 +888,13 @@ static int atmel_tdes_ofb_decrypt(struct skcipher_request *req)
static int atmel_tdes_init_tfm(struct crypto_skcipher *tfm)
{
struct atmel_tdes_ctx *ctx = crypto_skcipher_ctx(tfm);
- struct atmel_tdes_dev *dd;
-
- crypto_skcipher_set_reqsize(tfm, sizeof(struct atmel_tdes_reqctx));
- dd = atmel_tdes_find_dev(ctx);
- if (!dd)
+ ctx->dd = atmel_tdes_dev_alloc();
+ if (!ctx->dd)
return -ENODEV;
+ crypto_skcipher_set_reqsize(tfm, sizeof(struct atmel_tdes_reqctx));
+
return 0;
}
--
2.25.1
next prev parent reply other threads:[~2021-07-20 8:57 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-20 8:55 [PATCH 0/9] crypto: atmel-{aes, tdes}: Fix corner cases - crypto self tests Tudor Ambarus
2021-07-20 8:55 ` Tudor Ambarus [this message]
2021-07-20 8:55 ` [PATCH 2/9] crypto: atmel-tdes: Handle error messages Tudor Ambarus
2021-07-20 8:55 ` [PATCH 3/9] crypto: atmel-aes: Add blocksize constraint for ECB and CBC modes Tudor Ambarus
2021-07-20 8:55 ` [PATCH 4/9] crypto: atmel-aes: Add XTS input length constraint Tudor Ambarus
2021-07-20 8:55 ` [PATCH 5/9] crypto: atmel-aes: Add NIST 800-38A's zero length cryptlen constraint Tudor Ambarus
2021-07-20 8:55 ` [PATCH 6/9] crypto: atmel-tdes: Add FIPS81's " Tudor Ambarus
2021-07-20 8:55 ` [PATCH 7/9] crypto: atmel-{aes, tdes}: Set OFB's blocksize to 1 Tudor Ambarus
2021-07-20 8:55 ` [PATCH 8/9] crypto: atmel-aes: Add fallback to XTS software implementation Tudor Ambarus
2021-07-20 8:55 ` [PATCH 9/9] crypto: atmel-aes: Allocate aes dev at tfm init time Tudor Ambarus
2021-07-30 3:10 ` [PATCH 0/9] crypto: atmel-{aes, tdes}: Fix corner cases - crypto self tests Herbert Xu
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