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From: Michal Simek <monstr@seznam.cz>
To: Kalyani Akula <kalyani.akula@xilinx.com>,
	linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: git <git@xilinx.com>, Harsh Jain <harshj@xilinx.com>,
	Sarat Chand Savitala <saratcha@xilinx.com>,
	Mohan <mohand@xilinx.com>, Kalyani Akul <kalyania@xilinx.com>
Subject: Re: [PATCH V4 3/4] firmware: xilinx: Add ZynqMP aes API for AES functionality
Date: Tue, 21 Jan 2020 10:15:50 +0100	[thread overview]
Message-ID: <3357664b-d502-ca0c-c166-679001de5f39@seznam.cz> (raw)
In-Reply-To: <1574235842-7930-4-git-send-email-kalyani.akula@xilinx.com>

On 20. 11. 19 8:44, Kalyani Akula wrote:
> Add ZynqMP firmware AES API to perform encryption/decryption of given data.
> 
> Signed-off-by: Kalyani Akula <kalyani.akula@xilinx.com>
> ---
>  drivers/firmware/xilinx/zynqmp.c     | 23 +++++++++++++++++++++++
>  include/linux/firmware/xlnx-zynqmp.h |  2 ++
>  2 files changed, 25 insertions(+)
> 
> diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c
> index fd3d837..7ddf38e 100644
> --- a/drivers/firmware/xilinx/zynqmp.c
> +++ b/drivers/firmware/xilinx/zynqmp.c
> @@ -664,6 +664,28 @@ static int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
>  				   qos, ack, NULL);
>  }
>  
> +/**
> + * zynqmp_pm_aes - Access AES hardware to encrypt/decrypt the data using
> + * AES-GCM core.
> + * @address:	Address of the AesParams structure.
> + * @out:	Returned output value
> + *
> + * Return:	Returns status, either success or error code.
> + */
> +static int zynqmp_pm_aes_engine(const u64 address, u32 *out)
> +{
> +	u32 ret_payload[PAYLOAD_ARG_CNT];
> +	int ret;
> +
> +	if (!out)
> +		return -EINVAL;
> +
> +	ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address),
> +				  lower_32_bits(address),
> +				  0, 0, ret_payload);
> +	*out = ret_payload[1];

newline here please.

> +	return ret;
> +}


newline here please.

>  static const struct zynqmp_eemi_ops eemi_ops = {
>  	.get_api_version = zynqmp_pm_get_api_version,
>  	.get_chipid = zynqmp_pm_get_chipid,
> @@ -687,6 +709,7 @@ static int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
>  	.set_requirement = zynqmp_pm_set_requirement,
>  	.fpga_load = zynqmp_pm_fpga_load,
>  	.fpga_get_status = zynqmp_pm_fpga_get_status,
> +	.aes = zynqmp_pm_aes_engine,
>  };
>  
>  /**
> diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h
> index 778abbb..508edd7 100644
> --- a/include/linux/firmware/xlnx-zynqmp.h
> +++ b/include/linux/firmware/xlnx-zynqmp.h
> @@ -77,6 +77,7 @@ enum pm_api_id {
>  	PM_CLOCK_GETRATE,
>  	PM_CLOCK_SETPARENT,
>  	PM_CLOCK_GETPARENT,
> +	PM_SECURE_AES = 47,
>  };
>  
>  /* PMU-FW return status codes */
> @@ -294,6 +295,7 @@ struct zynqmp_eemi_ops {
>  			       const u32 capabilities,
>  			       const u32 qos,
>  			       const enum zynqmp_pm_request_ack ack);
> +	int (*aes)(const u64 address, u32 *out);
>  };
>  
>  int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
> 

Thanks,
Michal

  reply	other threads:[~2020-01-21  9:17 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-20  7:43 [PATCH V4 0/4] Add Xilinx's ZynqMP AES-GCM driver support Kalyani Akula
2019-11-20  7:43 ` [PATCH V4 1/4] dt-bindings: crypto: Add bindings for ZynqMP AES driver Kalyani Akula
2020-01-21  9:11   ` Michal Simek
2019-11-20  7:44 ` [PATCH V4 2/4] ARM64: zynqmp: Add Xilinix AES node Kalyani Akula
2020-01-21  9:13   ` Michal Simek
2019-11-20  7:44 ` [PATCH V4 3/4] firmware: xilinx: Add ZynqMP aes API for AES functionality Kalyani Akula
2020-01-21  9:15   ` Michal Simek [this message]
2019-11-20  7:44 ` [PATCH V4 4/4] crypto: Add Xilinx AES driver Kalyani Akula
2020-01-21  9:23   ` Michal Simek
2020-01-20  6:59 ` [PATCH V4 0/4] Add Xilinx's ZynqMP AES-GCM driver support Kalyani Akula
2020-01-20  7:55   ` Herbert Xu
2020-01-21  9:26     ` Michal Simek
2020-01-22  5:51       ` Herbert Xu
2020-01-22  6:59         ` Michal Simek

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