linux-crypto.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Zhou Wang <wangzhou1@hisilicon.com>
To: YueHaibing <yuehaibing@huawei.com>, <herbert@gondor.apana.org.au>,
	<davem@davemloft.net>, <Jonathan.Cameron@huawei.com>,
	<xuzaibo@huawei.com>, <shiju.jose@huawei.com>,
	<ebiggers@google.com>, <yaohongbo@huawei.com>,
	<maowenan@huawei.com>, <arnd@arndb.de>
Cc: <linux-crypto@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH -next] crypto: hisilicon - Fix build error
Date: Mon, 30 Mar 2020 21:36:10 +0800	[thread overview]
Message-ID: <5E81F5CA.9040808@hisilicon.com> (raw)
In-Reply-To: <20200330083643.28824-1-yuehaibing@huawei.com>

On 2020/3/30 16:36, YueHaibing wrote:
> When UACCE is m, CRYPTO_DEV_HISI_QM cannot be built-in.
> But CRYPTO_DEV_HISI_QM is selected by CRYPTO_DEV_HISI_SEC2
> and CRYPTO_DEV_HISI_HPRE unconditionally, which may leads this:
> 
> drivers/crypto/hisilicon/qm.o: In function 'qm_alloc_uacce':
> drivers/crypto/hisilicon/qm.c:1579: undefined reference to 'uacce_alloc'
> 
> Add Kconfig dependency to enforce usable configurations.
> 
> Fixes: 47c16b449921 ("crypto: hisilicon - qm depends on UACCE")
> Signed-off-by: YueHaibing <yuehaibing@huawei.com>

Forgot to do the same thing like ZIP. Thanks for fixing this :)
so Reviewed-by: Zhou Wang <wangzhou1@hisilicon.com>

Best,
Zhou

> ---
>  drivers/crypto/hisilicon/Kconfig | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/crypto/hisilicon/Kconfig b/drivers/crypto/hisilicon/Kconfig
> index 095850d01dcc..f09c6cf7823e 100644
> --- a/drivers/crypto/hisilicon/Kconfig
> +++ b/drivers/crypto/hisilicon/Kconfig
> @@ -27,6 +27,7 @@ config CRYPTO_DEV_HISI_SEC2
>  	select CRYPTO_SHA256
>  	select CRYPTO_SHA512
>  	depends on PCI && PCI_MSI
> +	depends on UACCE || UACCE=n
>  	depends on ARM64 || (COMPILE_TEST && 64BIT)
>  	help
>  	  Support for HiSilicon SEC Engine of version 2 in crypto subsystem.
> @@ -58,6 +59,7 @@ config CRYPTO_DEV_HISI_ZIP
>  config CRYPTO_DEV_HISI_HPRE
>  	tristate "Support for HISI HPRE accelerator"
>  	depends on PCI && PCI_MSI
> +	depends on UACCE || UACCE=n
>  	depends on ARM64 || (COMPILE_TEST && 64BIT)
>  	select CRYPTO_DEV_HISI_QM
>  	select CRYPTO_DH
> 


  parent reply	other threads:[~2020-03-30 13:36 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-30  8:36 [PATCH -next] crypto: hisilicon - Fix build error YueHaibing
2020-03-30  9:03 ` Arnd Bergmann
2020-03-30 13:36 ` Zhou Wang [this message]
2020-04-03  4:41 ` Herbert Xu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=5E81F5CA.9040808@hisilicon.com \
    --to=wangzhou1@hisilicon.com \
    --cc=Jonathan.Cameron@huawei.com \
    --cc=arnd@arndb.de \
    --cc=davem@davemloft.net \
    --cc=ebiggers@google.com \
    --cc=herbert@gondor.apana.org.au \
    --cc=linux-crypto@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=maowenan@huawei.com \
    --cc=shiju.jose@huawei.com \
    --cc=xuzaibo@huawei.com \
    --cc=yaohongbo@huawei.com \
    --cc=yuehaibing@huawei.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).