From: "Herbert Xu" <herbert@gondor.apana.org.au>
To: Catalin Marinas <catalin.marinas@arm.com>,
Ard Biesheuvel <ardb@kernel.org>, Will Deacon <will@kernel.org>,
Marc Zyngier <maz@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Andrew Morton <akpm@linux-foundation.org>,
Linus Torvalds <torvalds@linux-foundation.org>,
Linux Memory Management List <linux-mm@kvack.org>,
Linux ARM <linux-arm-kernel@lists.infradead.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
"David S. Miller" <davem@davemloft.net>,
Linux Crypto Mailing List <linux-crypto@vger.kernel.org>
Subject: [PATCH 1/10] crypto: cavium - Set DMA alignment explicitly
Date: Fri, 02 Dec 2022 17:20:47 +0800 [thread overview]
Message-ID: <E1p12Dv-003Ao0-0r@formenos.hmeau.com> (raw)
In-Reply-To: Y4nDL50nToBbi4DS@gondor.apana.org.au
This driver has been implicitly relying on kmalloc alignment
to be sufficient for DMA. This may no longer be the case with
upcoming arm64 changes.
This patch changes it to explicitly request DMA alignment from
the Crypto API.
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
---
drivers/crypto/cavium/cpt/cptvf_algs.c | 10 +++++-----
drivers/crypto/cavium/nitrox/nitrox_aead.c | 12 ++++++------
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/crypto/cavium/cpt/cptvf_algs.c b/drivers/crypto/cavium/cpt/cptvf_algs.c
index ce3b91c612f0..9eca0c302186 100644
--- a/drivers/crypto/cavium/cpt/cptvf_algs.c
+++ b/drivers/crypto/cavium/cpt/cptvf_algs.c
@@ -97,7 +97,7 @@ static inline u32 create_ctx_hdr(struct skcipher_request *req, u32 enc,
{
struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
struct cvm_enc_ctx *ctx = crypto_skcipher_ctx(tfm);
- struct cvm_req_ctx *rctx = skcipher_request_ctx(req);
+ struct cvm_req_ctx *rctx = skcipher_request_ctx_dma(req);
struct fc_context *fctx = &rctx->fctx;
u32 enc_iv_len = crypto_skcipher_ivsize(tfm);
struct cpt_request_info *req_info = &rctx->cpt_req;
@@ -151,7 +151,7 @@ static inline u32 create_ctx_hdr(struct skcipher_request *req, u32 enc,
static inline u32 create_input_list(struct skcipher_request *req, u32 enc,
u32 enc_iv_len)
{
- struct cvm_req_ctx *rctx = skcipher_request_ctx(req);
+ struct cvm_req_ctx *rctx = skcipher_request_ctx_dma(req);
struct cpt_request_info *req_info = &rctx->cpt_req;
u32 argcnt = 0;
@@ -173,7 +173,7 @@ static inline void store_cb_info(struct skcipher_request *req,
static inline void create_output_list(struct skcipher_request *req,
u32 enc_iv_len)
{
- struct cvm_req_ctx *rctx = skcipher_request_ctx(req);
+ struct cvm_req_ctx *rctx = skcipher_request_ctx_dma(req);
struct cpt_request_info *req_info = &rctx->cpt_req;
u32 argcnt = 0;
@@ -193,7 +193,7 @@ static inline void create_output_list(struct skcipher_request *req,
static inline int cvm_enc_dec(struct skcipher_request *req, u32 enc)
{
struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
- struct cvm_req_ctx *rctx = skcipher_request_ctx(req);
+ struct cvm_req_ctx *rctx = skcipher_request_ctx_dma(req);
u32 enc_iv_len = crypto_skcipher_ivsize(tfm);
struct fc_context *fctx = &rctx->fctx;
struct cpt_request_info *req_info = &rctx->cpt_req;
@@ -335,7 +335,7 @@ static int cvm_ecb_des3_setkey(struct crypto_skcipher *cipher, const u8 *key,
static int cvm_enc_dec_init(struct crypto_skcipher *tfm)
{
- crypto_skcipher_set_reqsize(tfm, sizeof(struct cvm_req_ctx));
+ crypto_skcipher_set_reqsize_dma(tfm, sizeof(struct cvm_req_ctx));
return 0;
}
diff --git a/drivers/crypto/cavium/nitrox/nitrox_aead.c b/drivers/crypto/cavium/nitrox/nitrox_aead.c
index c93c4e41d267..0653484df23f 100644
--- a/drivers/crypto/cavium/nitrox/nitrox_aead.c
+++ b/drivers/crypto/cavium/nitrox/nitrox_aead.c
@@ -392,7 +392,7 @@ static int nitrox_rfc4106_setauthsize(struct crypto_aead *aead,
static int nitrox_rfc4106_set_aead_rctx_sglist(struct aead_request *areq)
{
- struct nitrox_rfc4106_rctx *rctx = aead_request_ctx(areq);
+ struct nitrox_rfc4106_rctx *rctx = aead_request_ctx_dma(areq);
struct nitrox_aead_rctx *aead_rctx = &rctx->base;
unsigned int assoclen = areq->assoclen - GCM_RFC4106_IV_SIZE;
struct scatterlist *sg;
@@ -424,7 +424,7 @@ static int nitrox_rfc4106_set_aead_rctx_sglist(struct aead_request *areq)
static void nitrox_rfc4106_callback(void *arg, int err)
{
struct aead_request *areq = arg;
- struct nitrox_rfc4106_rctx *rctx = aead_request_ctx(areq);
+ struct nitrox_rfc4106_rctx *rctx = aead_request_ctx_dma(areq);
struct nitrox_kcrypt_request *nkreq = &rctx->base.nkreq;
free_src_sglist(nkreq);
@@ -441,7 +441,7 @@ static int nitrox_rfc4106_enc(struct aead_request *areq)
{
struct crypto_aead *aead = crypto_aead_reqtfm(areq);
struct nitrox_crypto_ctx *nctx = crypto_aead_ctx(aead);
- struct nitrox_rfc4106_rctx *rctx = aead_request_ctx(areq);
+ struct nitrox_rfc4106_rctx *rctx = aead_request_ctx_dma(areq);
struct nitrox_aead_rctx *aead_rctx = &rctx->base;
struct se_crypto_request *creq = &aead_rctx->nkreq.creq;
int ret;
@@ -472,7 +472,7 @@ static int nitrox_rfc4106_enc(struct aead_request *areq)
static int nitrox_rfc4106_dec(struct aead_request *areq)
{
struct crypto_aead *aead = crypto_aead_reqtfm(areq);
- struct nitrox_crypto_ctx *nctx = crypto_aead_ctx(aead);
+ struct nitrox_crypto_ctx *nctx = crypto_aead_ctx_dma(aead);
struct nitrox_rfc4106_rctx *rctx = aead_request_ctx(areq);
struct nitrox_aead_rctx *aead_rctx = &rctx->base;
struct se_crypto_request *creq = &aead_rctx->nkreq.creq;
@@ -510,8 +510,8 @@ static int nitrox_rfc4106_init(struct crypto_aead *aead)
if (ret)
return ret;
- crypto_aead_set_reqsize(aead, sizeof(struct aead_request) +
- sizeof(struct nitrox_rfc4106_rctx));
+ crypto_aead_set_reqsize_dma(aead, sizeof(struct aead_request) +
+ sizeof(struct nitrox_rfc4106_rctx));
return 0;
}
next prev parent reply other threads:[~2022-12-02 9:21 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-02 9:19 [PATCH 0/10] crypto: Driver conversions for DMA alignment Herbert Xu
2022-12-02 9:20 ` Herbert Xu [this message]
2022-12-02 9:20 ` [PATCH 2/10] crypto: ccp - Set DMA alignment explicitly Herbert Xu
2022-12-02 9:20 ` [PATCH 3/10] crypto: ccree " Herbert Xu
2022-12-02 9:20 ` [PATCH 4/10] crypto: chelsio " Herbert Xu
2022-12-02 9:20 ` [PATCH 5/10] crypto: hisilicon/hpre " Herbert Xu
2022-12-02 9:20 ` [PATCH 6/10] crypto: safexcel " Herbert Xu
2022-12-02 9:20 ` [PATCH 7/10] crypto: keembay " Herbert Xu
2022-12-02 9:21 ` [PATCH 8/10] crypto: octeontx " Herbert Xu
2022-12-02 9:21 ` [PATCH 9/10] crypto: octeontx2 " Herbert Xu
2022-12-02 9:21 ` [PATCH 10/10] crypto: qce " Herbert Xu
2022-12-02 9:49 ` [PATCH 0/10] crypto: Driver conversions for DMA alignment liulongfang
2022-12-02 9:53 ` Herbert Xu
2022-12-04 9:32 ` Christoph Hellwig
2022-12-06 4:13 ` Herbert Xu
2022-12-06 6:27 ` Christoph Hellwig
2022-12-06 8:34 ` Herbert Xu
2022-12-29 8:58 ` [PATCH] crypto: sun8i-ss - Remove GFP_DMA and add DMA alignment padding Herbert Xu
2022-12-30 5:21 ` [PATCH] crypto: caam " Herbert Xu
2022-12-30 7:31 ` [PATCH] crypto: talitos " Herbert Xu
2023-01-08 17:37 ` Christoph Hellwig
2023-01-09 7:18 ` Christophe Leroy
2023-01-09 7:37 ` Herbert Xu
2023-01-08 17:36 ` [PATCH] crypto: caam " Christoph Hellwig
[not found] ` <DU0PR04MB95635D72885111458C50DB6F8EA89@DU0PR04MB9563.eurprd04.prod.outlook.com>
2023-02-24 10:18 ` [PATCH] crypto: caam - Fix edesc/iv ordering mixup Herbert Xu
2023-02-27 5:20 ` Meenakshi Aggarwal
2023-02-27 8:25 ` [v2 PATCH] " Herbert Xu
2023-02-28 7:05 ` Meenakshi Aggarwal
2023-01-03 6:51 ` [PATCH] crypto: sun8i-ss - Remove GFP_DMA and add DMA alignment padding Corentin Labbe
2023-01-03 7:26 ` Herbert Xu
2023-01-08 17:36 ` Christoph Hellwig
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