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x-originating-ip: [212.146.100.6] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 7569d221-cf46-4743-8ea1-08d720a1e40b x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(5600148)(711020)(4605104)(1401327)(4618075)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(2017052603328)(7193020);SRVR:VI1PR0402MB3901; x-ms-traffictypediagnostic: VI1PR0402MB3901: x-ms-exchange-purlcount: 1 x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:6790; x-forefront-prvs: 01294F875B x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(4636009)(346002)(396003)(376002)(39860400002)(136003)(366004)(199004)(189003)(229853002)(53936002)(9686003)(71200400001)(71190400001)(99286004)(81156014)(478600001)(66446008)(66946007)(6306002)(91956017)(76116006)(66556008)(64756008)(2906002)(5660300002)(6916009)(54906003)(66476007)(8936002)(55016002)(6436002)(6246003)(86362001)(316002)(52536014)(14454004)(186003)(305945005)(4326008)(966005)(74316002)(256004)(8676002)(81166006)(33656002)(7736002)(26005)(102836004)(14444005)(25786009)(7696005)(3846002)(6116002)(66066001)(76176011)(6506007)(53546011)(476003)(486006)(44832011)(446003);DIR:OUT;SFP:1101;SCL:1;SRVR:VI1PR0402MB3901;H:VI1PR0402MB3485.eurprd04.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: 8XqnvLQN7db/o+PmHloax15PmDb/8cZPxwCLRTuTF6fUA6ZcxghXZm/5VizpTbpEJgmPadkpgMpxdH5O7ofcjjr4eQh/HwQZ2S6Pyfzg+iHXp8R+IisrMVPGyflgflnHb77fqMnOOHlfC+ND0ravMDcihITrn0i3q/tfLusWdZYen0B8gpy99C2/ow6iqODZlAc50PRDRw6FRuUq/xBgmtAgJJGg+b2uCbRVpSqNz2fbrfCRWsLz4fp10357kh+/We8pQURVtwE2+sVYjI3ccN197mGGJuX/KPWsz9Y4XHEUetyQHKT17EFPcRV1ByLNcyemzdfNfvTl3uuP4jb1cKvDBz6c7HMex/MEYfjILcJHBZaCipzNFa/Kc1heH5DLf9dKFfP2Mq5RVVoCLyBcd8H4Xa8tlCGQdS05cgn2HUs= Content-Type: text/plain; charset="iso-8859-2" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7569d221-cf46-4743-8ea1-08d720a1e40b X-MS-Exchange-CrossTenant-originalarrivaltime: 14 Aug 2019 10:26:38.2261 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: v5DVCrKuBbyvBGI3L5WppN9G0Sc2rc8oftryErIh3lYclrUMDC6EKUDO/lntXI7zWdiohW8vMUEqxua/OcB6YQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0402MB3901 Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org On 8/13/2019 9:51 PM, Andrey Smirnov wrote:=0A= > On Tue, Aug 13, 2019 at 6:59 AM Horia Geanta wrote= :=0A= >>=0A= >> On 8/12/2019 11:08 PM, Andrey Smirnov wrote:=0A= >>> Everyone:=0A= >>>=0A= >>> Picking up where Chris left off (I chatted with him privately=0A= >>> beforehead), this series adds support for i.MX8MQ to CAAM driver. Just= =0A= >>> like [v1], this series is i.MX8MQ only.=0A= >>>=0A= >>> Feedback is welcome!=0A= >>> Thanks,=0A= >>> Andrey Smirnov=0A= >>>=0A= >>> Changes since [v6]:=0A= >>>=0A= >>> - Fixed build problems in "crypto: caam - make CAAM_PTR_SZ dynamic"= =0A= >>>=0A= >>> - Collected Reviewied-by from Horia=0A= >>>=0A= >>> - "crypto: caam - force DMA address to 32-bit on 64-bit i.MX SoCs"=0A= >>> is changed to check 'caam_ptr_sz' instead of using 'caam_imx'=0A= >>>=0A= >>> - Incorporated feedback for "crypto: caam - request JR IRQ as the=0A= >>> last step" and "crypto: caam - simplfy clock initialization"=0A= >>>=0A= >> FYI - the series does not apply cleanly on current cryptodev-2.6 tree.= =0A= >>=0A= > =0A= > OK, sorry about that, will fix.=0A= > =0A= Please also include the crypto DT node in v8 series - see patch below.=0A= =0A= I would like to go with it through the cryptodev-2.6 tree,=0A= to save one kernel release cycle.=0A= This way kernel v5.4 would support CAAM on i.MX8MQ.=0A= =0A= That's how we previously did for i.MX7ULP and Herbert and Shawn agreed.=0A= Details (including who to Cc) here:=0A= https://patchwork.kernel.org/patch/10978811/=0A= =0A= -- >8 --=0A= =0A= Subject: [PATCH] arm64: dts: imx8mq: add crypto node=0A= =0A= Add node for CAAM - Cryptographic Acceleration and Assurance Module.=0A= =0A= Signed-off-by: Horia Geant=E3 =0A= ---=0A= arch/arm64/boot/dts/freescale/imx8mq.dtsi | 30 +++++++++++++++++++++++=0A= 1 file changed, 30 insertions(+)=0A= =0A= diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dt= s/freescale/imx8mq.dtsi=0A= index d09b808eff87..197965dac505 100644=0A= --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi=0A= +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi=0A= @@ -728,6 +728,36 @@=0A= status =3D "disabled";=0A= };=0A= =0A= + crypto: crypto@30900000 {=0A= + compatible =3D "fsl,sec-v4.0";=0A= + #address-cells =3D <0x1>;=0A= + #size-cells =3D <0x1>;=0A= + reg =3D <0x30900000 0x40000>;=0A= + ranges =3D <0 0x30900000 0x40000>;=0A= + interrupts =3D ;=0A= + clocks =3D <&clk IMX8MQ_CLK_AHB>,=0A= + <&clk IMX8MQ_CLK_IPG_ROOT>;=0A= + clock-names =3D "aclk", "ipg";=0A= +=0A= + sec_jr0: jr0@1000 {=0A= + compatible =3D "fsl,sec-v4.0-job-ring";=0A= + reg =3D <0x1000 0x1000>;=0A= + interrupts =3D ;=0A= + };=0A= +=0A= + sec_jr1: jr1@2000 {=0A= + compatible =3D "fsl,sec-v4.0-job-ring";=0A= + reg =3D <0x2000 0x1000>;=0A= + interrupts =3D ;=0A= + };=0A= +=0A= + sec_jr2: jr2@3000 {=0A= + compatible =3D "fsl,sec-v4.0-job-ring";=0A= + reg =3D <0x3000 0x1000>;=0A= + interrupts =3D ;=0A= + };=0A= + };=0A= +=0A= i2c1: i2c@30a20000 {=0A= compatible =3D "fsl,imx8mq-i2c", "fsl,imx21-i2c";=0A= reg =3D <0x30a20000 0x10000>;=0A= -- =0A= 2.17.1=0A=