Re: [PATCH v8 00/16] crypto: caam - Add i.MX8MQ support

[Iuliana Prodan <iuliana.prodan@nxp.com>]

On 8/30/2019 11:23 AM, Herbert Xu wrote:
> Andrey Smirnov <andrew.smirnov@gmail.com> wrote:
>> Everyone:
>>
>> Picking up where Chris left off (I chatted with him privately
>> beforehead), this series adds support for i.MX8MQ to CAAM driver. Just
>> like [v1], this series is i.MX8MQ only.
>>
>> Feedback is welcome!
>> Thanks,
>> Andrey Smirnov
>>
>> Changes since [v7]:
>>
>>   - Series rebase on latest cryptodev-2.6 (198429631a85)
>>
>>   - "crypto: caam - force DMA address to 32-bit on 64-bit i.MX SoCs"
>>     converted to use CTPR and MCFGR to determine CAAM pointer width
>>     and renamed to "crypto: caam - select DMA address size at runtime"
>>
>>   - Patch adding corresponding DT node added to the series
>>
>> Changes since [v6]:
>>
>>   - Fixed build problems in "crypto: caam - make CAAM_PTR_SZ dynamic"
>>
>>   - Collected Reviewied-by from Horia
>>
>>   - "crypto: caam - force DMA address to 32-bit on 64-bit i.MX SoCs"
>>     is changed to check 'caam_ptr_sz' instead of using 'caam_imx'
>>     
>>   - Incorporated feedback for "crypto: caam - request JR IRQ as the
>>     last step" and "crypto: caam - simplfy clock initialization"
>>
>> Changes since [v5]:
>>
>>   - Hunk replacing sizeof(*jrp->inpring) to SIZEOF_JR_INPENTRY in
>>     "crypto: caam - don't hardcode inpentry size", lost in [v5], is
>>     back
>>
>>   - Collected Tested-by from Iuliana
>>
>> Changes since [v4]:
>>
>>   - Fixed missing sentinel element in "crypto: caam - simplfy clock
>>     initialization"
>>     
>>   - Squashed all of the devers related patches into a single one and
>>     converted IRQ allocation to use devres while at it
>>
>>   - Added "crypto: caam - request JR IRQ as the last step" as
>>     discussed
>>
>> Changes since [v3]:
>>
>>   - Patchset changed to select DMA size at runtime in order to enable
>>     support for both i.MX8MQ and Layerscape at the same time. I only
>>     tested the patches on i.MX6,7 and 8MQ, since I don't have access
>>     to any of the Layerscape HW. Any help in that regard would be
>>     appareciated.
>>
>>   - Bulk clocks and their number are now stored as a part of struct
>>     caam_drv_private to simplify allocation and cleanup code (no
>>     special context needed)
>>     
>>   - Renamed 'soc_attr' -> 'imx_soc_match' for clarity
>>
>> Changes since [v2]:
>>
>>   - Dropped "crypto: caam - do not initialise clocks on the i.MX8" and
>>     replaced it with "crypto: caam - simplfy clock initialization" and
>>     "crypto: caam - add clock entry for i.MX8MQ"
>>
>>
>> Changes since [v1]
>>
>>   - Series reworked to continue using register based interface for
>>     queueing RNG initialization job, dropping "crypto: caam - use job
>>     ring for RNG instantiation instead of DECO"
>>
>>   - Added a patch to share DMA mask selection code
>>
>>   - Added missing Signed-off-by for authors of original NXP tree
>>     commits that this sereis is based on
>>
>> [v7] lore.kernel.org/r/20190812200739.30389-1-andrew.smirnov@gmail.com
>> [v6] lore.kernel.org/r/20190717152458.22337-1-andrew.smirnov@gmail.com
>> [v5] lore.kernel.org/r/20190715201942.17309-1-andrew.smirnov@gmail.com
>> [v4] lore.kernel.org/r/20190703081327.17505-1-andrew.smirnov@gmail.com
>> [v3] lore.kernel.org/r/20190617160339.29179-1-andrew.smirnov@gmail.com
>> [v2] lore.kernel.org/r/20190607200225.21419-1-andrew.smirnov@gmail.com
>> [v1] https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.kernel.org%2Fcover%2F10825625%2F&amp;data=02%7C01%7Ciuliana.prodan%40nxp.com%7C33d82b783fe44b7397a108d72d2361d7%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637027502298978288&amp;sdata=Tc%2FSuS60cL8%2FLisYBtfarPAVmcx7ITpNgaiLMq5YLIs%3D&amp;reserved=0
>>
>> Andrey Smirnov (16):
>>   crypto: caam - move DMA mask selection into a function
>>   crypto: caam - simplfy clock initialization
>>   crypto: caam - convert caam_jr_init() to use devres
>>   crypto: caam - request JR IRQ as the last step
>>   crytpo: caam - make use of iowrite64*_hi_lo in wr_reg64
>>   crypto: caam - use ioread64*_hi_lo in rd_reg64
>>   crypto: caam - drop 64-bit only wr/rd_reg64()
>>   crypto: caam - share definition for MAX_SDLEN
>>   crypto: caam - make CAAM_PTR_SZ dynamic
>>   crypto: caam - move cpu_to_caam_dma() selection to runtime
>>   crypto: caam - drop explicit usage of struct jr_outentry
>>   crypto: caam - don't hardcode inpentry size
>>   crypto: caam - select DMA address size at runtime
>>   crypto: caam - always select job ring via RSR on i.MX8MQ
>>   crypto: caam - add clock entry for i.MX8MQ
>>   arm64: dts: imx8mq: Add CAAM node
>>
>> arch/arm64/boot/dts/freescale/imx8mq.dtsi |  30 +++
>> drivers/crypto/caam/caamalg.c             |   2 +-
>> drivers/crypto/caam/caamalg_qi2.h         |  27 ---
>> drivers/crypto/caam/caamhash.c            |   2 +-
>> drivers/crypto/caam/caampkc.c             |   8 +-
>> drivers/crypto/caam/caamrng.c             |   2 +-
>> drivers/crypto/caam/ctrl.c                | 221 ++++++++++------------
>> drivers/crypto/caam/desc_constr.h         |  47 ++++-
>> drivers/crypto/caam/error.c               |   3 +
>> drivers/crypto/caam/intern.h              |  32 +++-
>> drivers/crypto/caam/jr.c                  |  93 +++------
>> drivers/crypto/caam/pdb.h                 |  16 +-
>> drivers/crypto/caam/pkc_desc.c            |   8 +-
>> drivers/crypto/caam/qi.h                  |  26 ---
>> drivers/crypto/caam/regs.h                | 140 ++++++++++----
>> 15 files changed, 359 insertions(+), 298 deletions(-)
> 
> Patches 1-15 applied.  Thanks.
> 
Hi Herbert,

Can you, please, add, also, the device tree patch ("arm64: dts: imx8mq: 
Add CAAM node") in cryptodev tree?
Unfortunately Shawn Guo wasn't cc-ed on this patch and, to have the 
complete support for imx8mq, in kernel v5.4, we need the node in dts.

Thank you,
Iulia