From: Gary R Hook <gary.hook@amd.com>
To: Rijo Thomas <Rijo-john.Thomas@amd.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Herbert Xu <herbert@gondor.apana.org.au>,
"David S . Miller" <davem@davemloft.net>,
linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org
Cc: Nimesh Easow <Nimesh.Easow@amd.com>,
Devaraj Rangasamy <Devaraj.Rangasamy@amd.com>,
Jens Wiklander <jens.wiklander@linaro.org>,
Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: Re: [RFC PATCH v3 3/6] crypto: ccp - move SEV vdata to a dedicated data structure
Date: Thu, 19 Dec 2019 16:56:37 -0600 [thread overview]
Message-ID: <a516221c-5a4b-efff-38d5-da3a35bcd388@amd.com> (raw)
In-Reply-To: <f1ce9dbeb28ba2adfe9ad205d59f0a91fefd5a33.1575438845.git.Rijo-john.Thomas@amd.com>
On 12/4/19 12:19 AM, Rijo Thomas wrote:
> PSP can support both SEV and TEE interface. Therefore, move
> SEV specific registers to a dedicated data structure.
> TEE interface specific registers will be added in a later
> patch.
>
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: Tom Lendacky <thomas.lendacky@amd.com>
> Cc: Jens Wiklander <jens.wiklander@linaro.org>
> Co-developed-by: Devaraj Rangasamy <Devaraj.Rangasamy@amd.com>
> Signed-off-by: Devaraj Rangasamy <Devaraj.Rangasamy@amd.com>
> Signed-off-by: Rijo Thomas <Rijo-john.Thomas@amd.com>
Acked-by: Gary R Hook <gary.hook@amd.com>
> ---
> drivers/crypto/ccp/sev-dev.c | 17 ++++++++++++-----
> drivers/crypto/ccp/sev-dev.h | 2 ++
> drivers/crypto/ccp/sp-dev.h | 6 +++++-
> drivers/crypto/ccp/sp-pci.c | 16 ++++++++++++----
> 4 files changed, 31 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/crypto/ccp/sev-dev.c b/drivers/crypto/ccp/sev-dev.c
> index a608b52..e68fa48 100644
> --- a/drivers/crypto/ccp/sev-dev.c
> +++ b/drivers/crypto/ccp/sev-dev.c
> @@ -65,7 +65,7 @@ static void sev_irq_handler(int irq, void *data, unsigned int status)
> return;
>
> /* Check if it is SEV command completion: */
> - reg = ioread32(sev->io_regs + sev->psp->vdata->cmdresp_reg);
> + reg = ioread32(sev->io_regs + sev->vdata->cmdresp_reg);
> if (reg & PSP_CMDRESP_RESP) {
> sev->int_rcvd = 1;
> wake_up(&sev->int_queue);
> @@ -82,7 +82,7 @@ static int sev_wait_cmd_ioc(struct sev_device *sev,
> if (!ret)
> return -ETIMEDOUT;
>
> - *reg = ioread32(sev->io_regs + sev->psp->vdata->cmdresp_reg);
> + *reg = ioread32(sev->io_regs + sev->vdata->cmdresp_reg);
>
> return 0;
> }
> @@ -148,15 +148,15 @@ static int __sev_do_cmd_locked(int cmd, void *data, int *psp_ret)
> print_hex_dump_debug("(in): ", DUMP_PREFIX_OFFSET, 16, 2, data,
> sev_cmd_buffer_len(cmd), false);
>
> - iowrite32(phys_lsb, sev->io_regs + psp->vdata->cmdbuff_addr_lo_reg);
> - iowrite32(phys_msb, sev->io_regs + psp->vdata->cmdbuff_addr_hi_reg);
> + iowrite32(phys_lsb, sev->io_regs + sev->vdata->cmdbuff_addr_lo_reg);
> + iowrite32(phys_msb, sev->io_regs + sev->vdata->cmdbuff_addr_hi_reg);
>
> sev->int_rcvd = 0;
>
> reg = cmd;
> reg <<= SEV_CMDRESP_CMD_SHIFT;
> reg |= SEV_CMDRESP_IOC;
> - iowrite32(reg, sev->io_regs + psp->vdata->cmdresp_reg);
> + iowrite32(reg, sev->io_regs + sev->vdata->cmdresp_reg);
>
> /* wait for command completion */
> ret = sev_wait_cmd_ioc(sev, ®, psp_timeout);
> @@ -949,6 +949,13 @@ int sev_dev_init(struct psp_device *psp)
>
> sev->io_regs = psp->io_regs;
>
> + sev->vdata = (struct sev_vdata *)psp->vdata->sev;
> + if (!sev->vdata) {
> + ret = -ENODEV;
> + dev_err(dev, "sev: missing driver data\n");
> + goto e_err;
> + }
> +
> psp_set_sev_irq_handler(psp, sev_irq_handler, sev);
>
> ret = sev_misc_init(sev);
> diff --git a/drivers/crypto/ccp/sev-dev.h b/drivers/crypto/ccp/sev-dev.h
> index 3d84ac3..dd5c4fe 100644
> --- a/drivers/crypto/ccp/sev-dev.h
> +++ b/drivers/crypto/ccp/sev-dev.h
> @@ -40,6 +40,8 @@ struct sev_device {
>
> void __iomem *io_regs;
>
> + struct sev_vdata *vdata;
> +
> int state;
> unsigned int int_rcvd;
> wait_queue_head_t int_queue;
> diff --git a/drivers/crypto/ccp/sp-dev.h b/drivers/crypto/ccp/sp-dev.h
> index 53c1256..0394c75 100644
> --- a/drivers/crypto/ccp/sp-dev.h
> +++ b/drivers/crypto/ccp/sp-dev.h
> @@ -39,10 +39,14 @@ struct ccp_vdata {
> const unsigned int rsamax;
> };
>
> -struct psp_vdata {
> +struct sev_vdata {
> const unsigned int cmdresp_reg;
> const unsigned int cmdbuff_addr_lo_reg;
> const unsigned int cmdbuff_addr_hi_reg;
> +};
> +
> +struct psp_vdata {
> + const struct sev_vdata *sev;
> const unsigned int feature_reg;
> const unsigned int inten_reg;
> const unsigned int intsts_reg;
> diff --git a/drivers/crypto/ccp/sp-pci.c b/drivers/crypto/ccp/sp-pci.c
> index b29d2e6..733693d 100644
> --- a/drivers/crypto/ccp/sp-pci.c
> +++ b/drivers/crypto/ccp/sp-pci.c
> @@ -262,19 +262,27 @@ static int sp_pci_resume(struct pci_dev *pdev)
> #endif
>
> #ifdef CONFIG_CRYPTO_DEV_SP_PSP
> -static const struct psp_vdata pspv1 = {
> +static const struct sev_vdata sevv1 = {
> .cmdresp_reg = 0x10580,
> .cmdbuff_addr_lo_reg = 0x105e0,
> .cmdbuff_addr_hi_reg = 0x105e4,
> +};
> +
> +static const struct sev_vdata sevv2 = {
> + .cmdresp_reg = 0x10980,
> + .cmdbuff_addr_lo_reg = 0x109e0,
> + .cmdbuff_addr_hi_reg = 0x109e4,
> +};
> +
> +static const struct psp_vdata pspv1 = {
> + .sev = &sevv1,
> .feature_reg = 0x105fc,
> .inten_reg = 0x10610,
> .intsts_reg = 0x10614,
> };
>
> static const struct psp_vdata pspv2 = {
> - .cmdresp_reg = 0x10980,
> - .cmdbuff_addr_lo_reg = 0x109e0,
> - .cmdbuff_addr_hi_reg = 0x109e4,
> + .sev = &sevv2,
> .feature_reg = 0x109fc,
> .inten_reg = 0x10690,
> .intsts_reg = 0x10694,
>
next prev parent reply other threads:[~2019-12-19 22:57 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-04 6:18 [RFC PATCH v3 0/6] Add TEE interface support to AMD Secure Processor driver Rijo Thomas
2019-12-04 6:18 ` [RFC PATCH v3 1/6] crypto: ccp - rename psp-dev files to sev-dev Rijo Thomas
2019-12-18 0:18 ` Gary R Hook
2019-12-19 22:56 ` Gary R Hook
2019-12-04 6:18 ` [RFC PATCH v3 2/6] crypto: ccp - create a generic psp-dev file Rijo Thomas
2019-12-19 22:56 ` Gary R Hook
2019-12-04 6:19 ` [RFC PATCH v3 3/6] crypto: ccp - move SEV vdata to a dedicated data structure Rijo Thomas
2019-12-19 22:56 ` Gary R Hook [this message]
2019-12-04 6:19 ` [RFC PATCH v3 4/6] crypto: ccp - check whether PSP supports SEV or TEE before initialization Rijo Thomas
2019-12-19 22:56 ` Gary R Hook
2019-12-04 6:19 ` [RFC PATCH v3 5/6] crypto: ccp - add TEE support for Raven Ridge Rijo Thomas
2019-12-19 22:57 ` Gary R Hook
2019-12-04 6:19 ` [RFC PATCH v3 6/6] crypto: ccp - provide in-kernel API to submit TEE commands Rijo Thomas
2019-12-19 22:57 ` Gary R Hook
2019-12-12 12:33 ` [RFC PATCH v3 0/6] Add TEE interface support to AMD Secure Processor driver Thomas, Rijo-john
2019-12-17 9:44 ` Herbert Xu
2019-12-20 7:04 ` Herbert Xu
2019-12-24 10:55 ` Thomas, Rijo-john
2019-12-27 2:43 ` Herbert Xu
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