From: guoren@kernel.org
To: palmerdabbelt@google.com, paul.walmsley@sifive.com,
anup@brainfault.org, greentime.hu@sifive.com, zong.li@sifive.com,
aou@eecs.berkeley.edu, tglx@linutronix.de, tycho@tycho.ws,
nickhu@andestech.com
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-csky@vger.kernel.org, Guo Ren <guoren@linux.alibaba.com>
Subject: [PATCH V2 3/3] riscv: Enable LOCKDEP_SUPPORT & fixup TRACE_IRQFLAGS_SUPPORT
Date: Sat, 27 Jun 2020 13:57:08 +0000 [thread overview]
Message-ID: <1593266228-61125-4-git-send-email-guoren@kernel.org> (raw)
In-Reply-To: <1593266228-61125-1-git-send-email-guoren@kernel.org>
From: Guo Ren <guoren@linux.alibaba.com>
Lockdep is needed by proving the spinlocks and rwlocks. To suupport
it, we need fixup TRACE_IRQFLAGS_SUPPORT in kernel/entry.S. This
patch follow Documentation/irqflags-tracing.txt.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Cc: Greentime Hu <greentime.hu@sifive.com>
---
arch/riscv/Kconfig | 3 +++
arch/riscv/kernel/entry.S | 34 +++++++++++++++++++++++++++++++++-
2 files changed, 36 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 58d6f66..d5d5100 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -179,6 +179,9 @@ config PGTABLE_LEVELS
default 3 if 64BIT
default 2
+config LOCKDEP_SUPPORT
+ def_bool y
+
source "arch/riscv/Kconfig.socs"
menu "Platform type"
diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
index cae7e6d..45c81e4 100644
--- a/arch/riscv/kernel/entry.S
+++ b/arch/riscv/kernel/entry.S
@@ -97,19 +97,26 @@ _save_context:
la gp, __global_pointer$
.option pop
- la ra, ret_from_exception
+#ifdef CONFIG_TRACE_IRQFLAGS
+ call trace_hardirqs_off
+#endif
/*
* MSB of cause differentiates between
* interrupts and exceptions
*/
bge s4, zero, 1f
+ la ra, ret_from_exception
+
/* Handle interrupts */
move a0, sp /* pt_regs */
la a1, handle_arch_irq
REG_L a1, (a1)
jr a1
1:
+#ifdef CONFIG_TRACE_IRQFLAGS
+ call trace_hardirqs_on
+#endif
/*
* Exceptions run with interrupts enabled or disabled depending on the
* state of SR_PIE in m/sstatus.
@@ -119,6 +126,7 @@ _save_context:
csrs CSR_STATUS, SR_IE
1:
+ la ra, ret_from_exception
/* Handle syscalls */
li t0, EXC_SYSCALL
beq s4, t0, handle_syscall
@@ -137,6 +145,17 @@ _save_context:
tail do_trap_unknown
handle_syscall:
+#ifdef CONFIG_TRACE_IRQFLAGS
+ /* Recover a0 - a7 for system calls */
+ REG_L a0, PT_A0(sp)
+ REG_L a1, PT_A1(sp)
+ REG_L a2, PT_A2(sp)
+ REG_L a3, PT_A3(sp)
+ REG_L a4, PT_A4(sp)
+ REG_L a5, PT_A5(sp)
+ REG_L a6, PT_A6(sp)
+ REG_L a7, PT_A7(sp)
+#endif
/* save the initial A0 value (needed in signal handlers) */
REG_S a0, PT_ORIG_A0(sp)
/*
@@ -190,6 +209,9 @@ ret_from_syscall_rejected:
ret_from_exception:
REG_L s0, PT_STATUS(sp)
csrc CSR_STATUS, SR_IE
+#ifdef CONFIG_TRACE_IRQFLAGS
+ call trace_hardirqs_off
+#endif
#ifdef CONFIG_RISCV_M_MODE
/* the MPP value is too large to be used as an immediate arg for addi */
li t0, SR_MPP
@@ -216,6 +238,16 @@ resume_userspace:
csrw CSR_SCRATCH, tp
restore_all:
+#ifdef CONFIG_TRACE_IRQFLAGS
+ REG_L s1, PT_STATUS(sp)
+ andi t0, s1, SR_PIE
+ beqz t0, 1f
+ call trace_hardirqs_on
+ j 2f
+1:
+ call trace_hardirqs_off
+2:
+#endif
REG_L a0, PT_STATUS(sp)
/*
* The current load reservation is effectively part of the processor's
--
2.7.4
next prev parent reply other threads:[~2020-06-27 13:58 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-27 13:57 [PATCH V2 0/3] riscv: Enable LOCKDEP guoren
2020-06-27 13:57 ` [PATCH V2 1/3] riscv: Fixup static_obj() fail guoren
2020-09-11 20:45 ` Aurelien Jarno
2020-09-12 2:39 ` Guo Ren
2020-09-14 10:38 ` Aurelien Jarno
2020-09-24 7:36 ` Andreas Schwab
2020-09-24 16:19 ` Guo Ren
2020-09-29 18:51 ` Aurelien Jarno
2020-10-05 19:14 ` Atish Patra
2020-10-06 16:46 ` Guo Ren
2020-10-06 20:38 ` Atish Patra
2020-10-07 14:45 ` Guo Ren
2020-10-05 8:25 ` Andreas Schwab
2020-10-05 16:39 ` Palmer Dabbelt
2020-10-05 18:40 ` Andreas Schwab
2020-10-05 19:45 ` Palmer Dabbelt
2020-10-05 21:12 ` Atish Patra
2020-10-05 21:17 ` Palmer Dabbelt
2020-10-06 16:55 ` Guo Ren
2020-06-27 13:57 ` [PATCH V2 2/3] riscv: Fixup lockdep_assert_held with wrong param cpu_running guoren
2020-09-29 22:12 ` Atish Patra
2020-06-27 13:57 ` guoren [this message]
2020-07-09 22:06 ` [PATCH V2 0/3] riscv: Enable LOCKDEP Palmer Dabbelt
2020-07-09 23:15 ` Guo Ren
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