From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A677C7618F for ; Mon, 22 Jul 2019 16:38:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 743F221901 for ; Mon, 22 Jul 2019 16:38:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727744AbfGVQiS (ORCPT ); Mon, 22 Jul 2019 12:38:18 -0400 Received: from foss.arm.com ([217.140.110.172]:41824 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727731AbfGVQiR (ORCPT ); Mon, 22 Jul 2019 12:38:17 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E72BF28; Mon, 22 Jul 2019 09:38:16 -0700 (PDT) Received: from arrakis.emea.arm.com (arrakis.cambridge.arm.com [10.1.196.78]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4C3953F694; Mon, 22 Jul 2019 09:38:14 -0700 (PDT) Date: Mon, 22 Jul 2019 17:38:12 +0100 From: Catalin Marinas To: Guo Ren Cc: Julien Grall , Linux Kernel Mailing List , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, aou@eecs.berkeley.edu, gary@garyguo.net, Atish Patra , hch@infradead.org, paul.walmsley@sifive.com, rppt@linux.ibm.com, linux-riscv@lists.infradead.org, Anup Patel , Palmer Dabbelt , suzuki.poulose@arm.com, Marc Zyngier , julien.thierry@arm.com, Will Deacon , christoffer.dall@arm.com, james.morse@arm.com, linux-csky@vger.kernel.org Subject: Re: [PATCH RFC 11/14] arm64: Move the ASID allocator code in a separate file Message-ID: <20190722163811.GJ60625@arrakis.emea.arm.com> References: <0dfe120b-066a-2ac8-13bc-3f5a29e2caa3@arm.com> <20190621141606.GF18954@arrakis.emea.arm.com> <20190624153820.GH29120@arrakis.emea.arm.com> <20190701091711.GA21774@arrakis.emea.arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-csky-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-csky@vger.kernel.org On Tue, Jul 16, 2019 at 11:31:27AM +0800, Guo Ren wrote: > I saw arm64 to prevent speculation by temporarily setting TTBR0.el1 to > a zero page table. Is that used to prevent speculative execution user > space code or just prevent ld/st in copy_use_* ? Only to prevent explicit ld/st from user. On ARMv8.1+, we don't normally use the TTBR0 trick but rather disable user space access using the PAN (privileged access never) feature. However, I don't think PAN disables speculative accesses, only explicit loads/stores. Also, with ARMv8.2 Linux uses the LDTR/STTR instructions in copy_*_user() which don't need to disable PAN explicitly. -- Catalin