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From: guoren@kernel.org
To: palmer@rivosinc.com, heiko@sntech.de, hch@infradead.org,
	arnd@arndb.de, peterz@infradead.org, will@kernel.org,
	boqun.feng@gmail.com, longman@redhat.com, shorne@gmail.com,
	conor.dooley@microchip.com
Cc: linux-csky@vger.kernel.org, linux-arch@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	Guo Ren <guoren@linux.alibaba.com>, Guo Ren <guoren@kernel.org>
Subject: [PATCH V9 08/15] riscv: cmpxchg: Forbid arch_cmpxchg64 for 32-bit
Date: Mon,  8 Aug 2022 03:13:11 -0400	[thread overview]
Message-ID: <20220808071318.3335746-9-guoren@kernel.org> (raw)
In-Reply-To: <20220808071318.3335746-1-guoren@kernel.org>

From: Guo Ren <guoren@linux.alibaba.com>

RISC-V 32-bit couldn't support lr.d/sc.d instructions, so using
arch_cmpxchg64 would cause error. Add forbid code to prevent the
situation.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Signed-off-by: Guo Ren <guoren@kernel.org>
---
 arch/riscv/include/asm/cmpxchg.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/riscv/include/asm/cmpxchg.h b/arch/riscv/include/asm/cmpxchg.h
index 567ed2e274c4..14c9280c7f7f 100644
--- a/arch/riscv/include/asm/cmpxchg.h
+++ b/arch/riscv/include/asm/cmpxchg.h
@@ -25,6 +25,7 @@
 			: "memory");					\
 		break;							\
 	case 8:								\
+		BUILD_BUG_ON(IS_ENABLED(CONFIG_32BIT));			\
 		__asm__ __volatile__ (					\
 			"	amoswap.d %0, %2, %1\n"			\
 			: "=r" (__ret), "+A" (*__ptr)			\
@@ -58,6 +59,7 @@
 			: "memory");					\
 		break;							\
 	case 8:								\
+		BUILD_BUG_ON(IS_ENABLED(CONFIG_32BIT));			\
 		__asm__ __volatile__ (					\
 			"	amoswap.d.aqrl %0, %2, %1\n"		\
 			: "=r" (__ret), "+A" (*__ptr)			\
@@ -101,6 +103,7 @@
 			: "memory");					\
 		break;							\
 	case 8:								\
+		BUILD_BUG_ON(IS_ENABLED(CONFIG_32BIT));			\
 		__asm__ __volatile__ (					\
 			"0:	lr.d %0, %2\n"				\
 			"	bne %0, %z3, 1f\n"			\
@@ -146,6 +149,7 @@
 			: "memory");					\
 		break;							\
 	case 8:								\
+		BUILD_BUG_ON(IS_ENABLED(CONFIG_32BIT));			\
 		__asm__ __volatile__ (					\
 			"0:	lr.d %0, %2\n"				\
 			"	bne %0, %z3, 1f\n"			\
@@ -192,6 +196,7 @@
 			: "memory");					\
 		break;							\
 	case 8:								\
+		BUILD_BUG_ON(IS_ENABLED(CONFIG_32BIT));			\
 		__asm__ __volatile__ (					\
 			"0:	lr.d %0, %2\n"				\
 			"	bne %0, %z3, 1f\n"			\
@@ -220,6 +225,7 @@
 #define arch_cmpxchg_local(ptr, o, n)					\
 	(__cmpxchg_relaxed((ptr), (o), (n), sizeof(*(ptr))))
 
+#ifdef CONFIG_64BIT
 #define arch_cmpxchg64(ptr, o, n)					\
 ({									\
 	BUILD_BUG_ON(sizeof(*(ptr)) != 8);				\
@@ -231,5 +237,6 @@
 	BUILD_BUG_ON(sizeof(*(ptr)) != 8);				\
 	arch_cmpxchg_relaxed((ptr), (o), (n));				\
 })
+#endif /* CONFIG_64BIT */
 
 #endif /* _ASM_RISCV_CMPXCHG_H */
-- 
2.36.1


  parent reply	other threads:[~2022-08-08  7:15 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-08  7:13 [PATCH V9 00/15] arch: Add qspinlock support and atomic cleanup guoren
2022-08-08  7:13 ` [PATCH V9 01/15] asm-generic: ticket-lock: Remove unnecessary atomic_read guoren
2022-08-08  7:13 ` [PATCH V9 02/15] asm-generic: ticket-lock: Use the same struct definitions with qspinlock guoren
2022-08-08  7:13 ` [PATCH V9 03/15] asm-generic: ticket-lock: Move into ticket_spinlock.h guoren
2022-08-08  7:13 ` [PATCH V9 04/15] asm-generic: ticket-lock: Keep ticket-lock the same semantic with qspinlock guoren
2022-08-08  7:13 ` [PATCH V9 05/15] asm-generic: spinlock: Add queued spinlock support in common header guoren
2022-08-08  7:13 ` [PATCH V9 06/15] riscv: atomic: Clean up unnecessary acquire and release definitions guoren
2022-08-08  7:13 ` [PATCH V9 07/15] riscv: cmpxchg: Remove xchg32 and xchg64 guoren
2022-08-08  7:13 ` guoren [this message]
2022-08-08  7:13 ` [PATCH V9 09/15] riscv: cmpxchg: Optimize cmpxchg64 guoren
2022-08-08  7:13 ` [PATCH V9 10/15] riscv: Enable ARCH_INLINE_READ*/WRITE*/SPIN* guoren
2022-08-08  7:13 ` [PATCH V9 11/15] riscv: Add qspinlock support guoren
2022-08-08  7:13 ` [PATCH V9 12/15] riscv: Add combo spinlock support guoren
2022-08-08  7:13 ` [PATCH V9 13/15] openrisc: cmpxchg: Cleanup unnecessary codes guoren
2022-08-08  7:13 ` [PATCH V9 14/15] openrisc: Move from ticket-lock to qspinlock guoren
2022-08-08  7:13 ` [PATCH V9 15/15] csky: spinlock: Use the generic header files guoren
2022-08-08  7:25 ` [PATCH V9 00/15] arch: Add qspinlock support and atomic cleanup Guo Ren

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