From: Will Deacon <will@kernel.org>
To: Liao Chang <liaochang1@huawei.com>
Cc: catalin.marinas@arm.com, guoren@kernel.org,
paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, mhiramat@kernel.org, rostedt@goodmis.org,
mark.rutland@arm.com, maz@kernel.org, alexandru.elisei@arm.com,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-csky@vger.kernel.org,
linux-riscv@lists.infradead.org
Subject: Re: [PATCH 3/3] arm64/kprobe: Optimize the performance of patching single-step slot
Date: Fri, 23 Sep 2022 13:35:30 +0100 [thread overview]
Message-ID: <20220923123529.GB13942@willie-the-truck> (raw)
In-Reply-To: <20220923084658.99304-4-liaochang1@huawei.com>
On Fri, Sep 23, 2022 at 04:46:58PM +0800, Liao Chang wrote:
> Single-step slot would not be used until kprobe is enabled, that means
> no race condition occurs on it under SMP, hence it is safe to pacth ss
> slot without stopping machine.
>
> Since I and D caches are coherent within single-step slot from
> aarch64_insn_patch_text_nosync(), hence no need to do it again via
> flush_icache_range().
>
> Acked-by: Masami Hiramatsu (Google) <mhiramat@kernel.org>
> Signed-off-by: Liao Chang <liaochang1@huawei.com>
> ---
> arch/arm64/kernel/probes/kprobes.c | 7 ++-----
> 1 file changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/arch/arm64/kernel/probes/kprobes.c b/arch/arm64/kernel/probes/kprobes.c
> index d1d182320245..29b98bc12833 100644
> --- a/arch/arm64/kernel/probes/kprobes.c
> +++ b/arch/arm64/kernel/probes/kprobes.c
> @@ -44,13 +44,10 @@ post_kprobe_handler(struct kprobe *, struct kprobe_ctlblk *, struct pt_regs *);
> static void __kprobes arch_prepare_ss_slot(struct kprobe *p)
> {
> kprobe_opcode_t *addr = p->ainsn.api.insn;
> - void *addrs[] = {addr, addr + 1};
> - u32 insns[] = {p->opcode, BRK64_OPCODE_KPROBES_SS};
>
> /* prepare insn slot */
> - aarch64_insn_patch_text(addrs, insns, 2);
> -
> - flush_icache_range((uintptr_t)addr, (uintptr_t)(addr + MAX_INSN_SIZE));
> + aarch64_insn_patch_text_nosync(addr, p->opcode);
> + aarch64_insn_patch_text_nosync(addr + 1, BRK64_OPCODE_KPROBES_SS);
>
> /*
> * Needs restoring of return address after stepping xol.
> --
> 2.17.1
Acked-by: Will Deacon <will@kernel.org>
Will
next prev parent reply other threads:[~2022-09-23 12:35 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-23 8:46 [PATCH V3 0/3] kprobe: Optimize the performance of patching ss Liao Chang
2022-09-23 8:46 ` [PATCH 1/3] riscv/kprobe: Optimize the performance of patching single-step slot Liao Chang
2022-09-23 8:46 ` [PATCH 2/3] csky/kprobe: " Liao Chang
2022-09-23 8:46 ` [PATCH 3/3] arm64/kprobe: " Liao Chang
2022-09-23 12:35 ` Will Deacon [this message]
2022-09-23 12:39 ` Mark Rutland
2022-09-24 1:52 ` liaochang (A)
2022-09-25 1:21 ` Masami Hiramatsu
2022-09-27 1:37 ` liaochang (A)
2022-09-27 2:24 [PATCH V4 0/3] kprobe: Optimize the performance of patching ss Liao Chang
2022-09-27 2:24 ` [PATCH 3/3] arm64/kprobe: Optimize the performance of patching single-step slot Liao Chang
2022-09-29 16:50 ` Catalin Marinas
2022-09-30 1:02 ` liaochang (A)
2022-09-30 8:15 ` Catalin Marinas
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