From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8707C433E0 for ; Sun, 7 Mar 2021 03:46:56 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A6C6764FF0 for ; Sun, 7 Mar 2021 03:46:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230052AbhCGDqY (ORCPT ); Sat, 6 Mar 2021 22:46:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33400 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230140AbhCGDqM (ORCPT ); Sat, 6 Mar 2021 22:46:12 -0500 Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 60916C06174A for ; Sat, 6 Mar 2021 19:46:03 -0800 (PST) Received: by mail-lf1-x135.google.com with SMTP id f1so13625319lfu.3 for ; Sat, 06 Mar 2021 19:46:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=brainfault-org.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=AK42aRGGlm/OwUAIuhucFNHyVgULs1imdF3+9v0RPss=; b=Od2sV+XL9dGBoMe9POd50mG8LzJC512QQXHmO81U27GfgmPEhF34q6AqrDA9r8k0Yd peUUq+yqmbfOckVB2is5/u2tK2nfPuelbHUK9xvG6+Xe5tjWDoTGVMhuMERtgFsLOEPQ EArmVnh15DuxPm1HUuXcSLhAWLmCrPp6e7Gogx4wrzBc85+52Gpx1swUu4MERHz14uAD bW1Ss8o2HbYs6LawyIxuRFdt5hdrRJjYm8xH7mkfKu7jf8xlqvSA40ZHWbLdp21k4f8a czleOcwq1m08z1RN8Dz3r6CybxVIr9PF0Td0kZ3XhSRCDj7GLIEiJtVIOm7qNquV1Dff Nglw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=AK42aRGGlm/OwUAIuhucFNHyVgULs1imdF3+9v0RPss=; b=d/X0aXgOznkgpUJ+wTnzgD+jdkHKNMkZYsahgdbk7syJaxENQijqW4T19wCbcUIj3g XXsSZFAl6EeZIaI7nybl+LMia0xTqSgUEuq+FHJGIYsy62DTlMVLaeypg+3rfRNgSegl cf7e3kqwVIvVJa3oAHMz61lEL3O/AvfboRUa//UlvLLsQ8ki5I59bA3hRxwrdcoU2kAV LuLaVswercZoPuaWejfgDWF2G9DgGzuucEq+W+6m0DUpUYdlLpqtEoqrUZLmksnHSyjT H2TxEBfPUYImh+HmM8REkafXSnXnJz01wY+zUjJtfeZqAuJFTGlGKO7fBqxuJzDp8hWm rykg== X-Gm-Message-State: AOAM530QINEJe4R0SwSFmQGa0S9AC6H6YKBxM/M7imWSOHWcgO/5iQd1 x+C0Z1r4VR+cQ+sOlJH+pDHc/SdH7k3BOwrU8IFECg== X-Google-Smtp-Source: ABdhPJxRKFoNmd92l+KRp5t2vy9zd1/V7LfqWmVyfpZjV8w8pdakYgr48HMBAWRHVDUXwnNEly1gYfskwlCIa4SYA30= X-Received: by 2002:a05:6512:234d:: with SMTP id p13mr10162815lfu.87.1615088761838; Sat, 06 Mar 2021 19:46:01 -0800 (PST) MIME-Version: 1.0 References: <20210307022446.63732-1-guoren@kernel.org> <20210307022446.63732-2-guoren@kernel.org> In-Reply-To: <20210307022446.63732-2-guoren@kernel.org> From: Anup Patel Date: Sun, 7 Mar 2021 09:15:49 +0530 Message-ID: Subject: Re: [PATCH 2/2] riscv: Enable generic clockevent broadcast To: Guo Ren Cc: Arnd Bergmann , "linux-kernel@vger.kernel.org List" , linux-arch@vger.kernel.org, linux-csky@vger.kernel.org, linux-riscv , Guo Ren , Thomas Gleixner , Daniel Lezcano , Anup Patel , Atish Patra , Palmer Dabbelt , Greentime Hu Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-csky@vger.kernel.org On Sun, Mar 7, 2021 at 7:55 AM wrote: > > From: Guo Ren > > When percpu-timers are stopped by deep power saving mode, we > need system timer help to broadcast IPI_TIMER. > > This is first introduced by broken x86 hardware, where the local apic > timer stops in C3 state. But many other architectures(powerpc, mips, > arm, hexagon, openrisc, sh) have supported the infrastructure to > deal with Power Management issues. > > Signed-off-by: Guo Ren > Cc: Arnd Bergmann > Cc: Thomas Gleixner > Cc: Daniel Lezcano > Cc: Anup Patel > Cc: Atish Patra > Cc: Palmer Dabbelt > Cc: Greentime Hu Looks good to me. Reviewed-by: Anup Patel Regards, Anup > --- > arch/riscv/Kconfig | 2 ++ > arch/riscv/kernel/smp.c | 16 ++++++++++++++++ > 2 files changed, 18 insertions(+) > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index 85d626b8ce5e..8637e7344abe 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -28,6 +28,7 @@ config RISCV > select ARCH_HAS_SET_DIRECT_MAP > select ARCH_HAS_SET_MEMORY > select ARCH_HAS_STRICT_KERNEL_RWX if MMU > + select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST > select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX > select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT > select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU > @@ -39,6 +40,7 @@ config RISCV > select EDAC_SUPPORT > select GENERIC_ARCH_TOPOLOGY if SMP > select GENERIC_ATOMIC64 if !64BIT > + select GENERIC_CLOCKEVENTS_BROADCAST if SMP > select GENERIC_EARLY_IOREMAP > select GENERIC_GETTIMEOFDAY if HAVE_GENERIC_VDSO > select GENERIC_IOREMAP > diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c > index ea028d9e0d24..8325d33411d8 100644 > --- a/arch/riscv/kernel/smp.c > +++ b/arch/riscv/kernel/smp.c > @@ -9,6 +9,7 @@ > */ > > #include > +#include > #include > #include > #include > @@ -27,6 +28,7 @@ enum ipi_message_type { > IPI_CALL_FUNC, > IPI_CPU_STOP, > IPI_IRQ_WORK, > + IPI_TIMER, > IPI_MAX > }; > > @@ -176,6 +178,12 @@ void handle_IPI(struct pt_regs *regs) > irq_work_run(); > } > > +#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST > + if (ops & (1 << IPI_TIMER)) { > + stats[IPI_TIMER]++; > + tick_receive_broadcast(); > + } > +#endif > BUG_ON((ops >> IPI_MAX) != 0); > > /* Order data access and bit testing. */ > @@ -192,6 +200,7 @@ static const char * const ipi_names[] = { > [IPI_CALL_FUNC] = "Function call interrupts", > [IPI_CPU_STOP] = "CPU stop interrupts", > [IPI_IRQ_WORK] = "IRQ work interrupts", > + [IPI_TIMER] = "Timer broadcast interrupts", > }; > > void show_ipi_stats(struct seq_file *p, int prec) > @@ -217,6 +226,13 @@ void arch_send_call_function_single_ipi(int cpu) > send_ipi_single(cpu, IPI_CALL_FUNC); > } > > +#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST > +void tick_broadcast(const struct cpumask *mask) > +{ > + send_ipi_mask(mask, IPI_TIMER); > +} > +#endif > + > void smp_send_stop(void) > { > unsigned long timeout; > -- > 2.25.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv