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Date:   Mon, 27 Sep 2021 17:21:24 -0700
From:   Ben Widawsky <ben.widawsky@intel.com>
To:     Dan Williams <dan.j.williams@intel.com>
Cc:     linux-cxl@vger.kernel.org
Subject: Re: [RFC PATCH] cxl: switch usp to parent cxl_port
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On 21-09-27 17:18:35, Dan Williams wrote:
> On Mon, Sep 27, 2021 at 5:06 PM Ben Widawsky <ben.widawsky@intel.com> wrote:
> [..]
> > > Per-above you probably want to start the scan below each root port, or
> > > otherwise filter out the top-level scan work that cxl_acpi owns.
> >
> > The scan will skip everything until it finds a USP or DSP which cxl_acpi
> > wouldn't be touching. I don't have any issue with:
> >
> > >         list_for_each_entry(dport, &root_port->dports, list)
> > >                 pci_walk_bus(dport->subordinate, match_uport, ctx);
> >
> > but I don't see any issue with the current code either. Did I miss something?
> 
> if (pdev->bus != root_bus)
>     return 0;
> 
> Doesn't that always fail for the switches in question? Did I miss
> where root_bus is updated?

In my previous comment I meant that I'd drop this check, but I see what you're
saying now. I need to pick some subordinate bus or I'll just walk over all
switches, even ones I don't care about...