From: Bjorn Helgaas <helgaas@kernel.org>
To: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
Cc: ira.weiny@intel.com, Dan Williams <dan.j.williams@intel.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ben Widawsky <ben.widawsky@intel.com>,
linux-kernel@vger.kernel.org, linux-cxl@vger.kernel.org,
linux-pci@vger.kernel.org
Subject: Re: [PATCH V6 04/10] PCI/DOE: Introduce pci_doe_create_doe_devices
Date: Fri, 4 Feb 2022 10:27:56 -0600 [thread overview]
Message-ID: <20220204162756.GA187525@bhelgaas> (raw)
In-Reply-To: <20220204145116.00000f5c@Huawei.com>
On Fri, Feb 04, 2022 at 02:51:16PM +0000, Jonathan Cameron wrote:
> On Thu, 3 Feb 2022 16:44:37 -0600
> Bjorn Helgaas <helgaas@kernel.org> wrote:
> > On Mon, Jan 31, 2022 at 11:19:46PM -0800, ira.weiny@intel.com wrote:
> > > + * pci_doe_create_doe_devices - Create auxiliary DOE devices for all DOE
> > > + * mailboxes found
> > > + * @pci_dev: The PCI device to scan for DOE mailboxes
> > > + *
> > > + * There is no coresponding destroy of these devices. This function associates
> > > + * the DOE auxiliary devices created with the pci_dev passed in. That
> > > + * association is device managed (devm_*) such that the DOE auxiliary device
> > > + * lifetime is always greater than or equal to the lifetime of the pci_dev.
> >
> > This seems backwards. What does it mean if the DOE aux dev
> > lifetime is *greater* than that of the pci_dev? Surely you can't
> > access a PCI DOE Capability if the pci_dev is gone?
>
> I think the description is inaccurate - the end of life is the same
> as that of the PCI driver binding to the pci_dev. It'll get cleared
> up if that is unbound etc.
I don't know much about devm, but I *think* the devm things get
released by devres_release_all(), which is called by
__device_release_driver() after it calls the bus or driver's .remove()
method (pci_device_remove(), in this case).
So in this case, I think the aux dev is created after the pci_dev and
released after the PCI driver and the PCI core are done with the
pci_dev. I assume some refcounting prevents the pci_dev from actually
being deallocated until the aux dev is done with it.
I'm not confident that this is a robust situation.
> > > + * done later within the DOE initialization, but as it
> > > + * potentially has other impacts keep it here when setting up
> > > + * the IRQ's.
> >
> > s/IRQ's/IRQs/
> >
> > "Potentially has other impacts" is too vague, and this doesn't
> > explain why bus mastering should be enabled here rather than
> > later. The device should not issue an MSI-X until DOE Interrupt
> > Enable is set, so near there seems like a logical place.
>
> I can't remember what lead to that comment so hopefully moving to
> just before the enable would be fine - if there was somewhere to do
> it. I'm not sure there is as the IRQ enable is in the Auxilliary
> Bus driver. If we pull the pci_alloc_irq_vectors() out of here into
> the caller, then the pci_set_master() should go with it.
I think pci_set_master() is tied to setting PCI_DOE_CTRL_INT_EN, not
to pci_alloc_irq_vectors().
Bjorn
next prev parent reply other threads:[~2022-02-04 16:28 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-01 7:19 [PATCH V6 00/10] CXL: Read CDAT and DSMAS data from the device ira.weiny
2022-02-01 7:19 ` [PATCH V6 01/10] PCI: Add vendor ID for the PCI SIG ira.weiny
2022-02-03 17:11 ` Bjorn Helgaas
2022-02-03 20:28 ` Ira Weiny
2022-02-01 7:19 ` [PATCH V6 02/10] PCI: Replace magic constant for PCI Sig Vendor ID ira.weiny
2022-02-04 21:16 ` Dan Williams
2022-02-04 21:49 ` Bjorn Helgaas
2022-03-15 21:48 ` Ira Weiny
2022-02-01 7:19 ` [PATCH V6 03/10] PCI/DOE: Add Data Object Exchange Aux Driver ira.weiny
2022-02-03 22:40 ` Bjorn Helgaas
2022-03-15 21:48 ` Ira Weiny
2022-02-09 0:59 ` Dan Williams
2022-02-09 10:13 ` Jonathan Cameron
2022-02-09 16:26 ` Dan Williams
2022-02-09 16:57 ` Jonathan Cameron
2022-02-09 19:57 ` Dan Williams
2022-02-10 21:51 ` Ira Weiny
2022-03-16 22:50 ` Ira Weiny
2022-03-17 19:37 ` Ira Weiny
2022-02-01 7:19 ` [PATCH V6 04/10] PCI/DOE: Introduce pci_doe_create_doe_devices ira.weiny
2022-02-03 22:44 ` Bjorn Helgaas
2022-02-04 14:51 ` Jonathan Cameron
2022-02-04 16:27 ` Bjorn Helgaas [this message]
2022-02-11 2:54 ` Dan Williams
2022-03-24 0:26 ` Ira Weiny
2022-03-24 14:05 ` Jonathan Cameron
2022-03-24 23:44 ` Ira Weiny
2022-03-25 12:02 ` Jonathan Cameron
2022-02-01 7:19 ` [PATCH V6 05/10] cxl/pci: Create DOE auxiliary devices ira.weiny
2022-02-01 7:19 ` [PATCH V6 06/10] cxl/pci: Find the DOE mailbox which supports CDAT ira.weiny
2022-02-01 18:49 ` Ben Widawsky
2022-02-01 22:18 ` Ira Weiny
2022-02-04 14:04 ` Jonathan Cameron
2022-02-01 7:19 ` [PATCH V6 07/10] cxl/mem: Read CDAT table ira.weiny
2022-02-04 13:46 ` Jonathan Cameron
2022-02-01 7:19 ` [PATCH V6 08/10] cxl/cdat: Introduce cdat_hdr_valid() ira.weiny
2022-02-01 18:56 ` Ben Widawsky
2022-02-01 22:29 ` Ira Weiny
2022-02-04 13:17 ` Jonathan Cameron
2022-02-01 7:19 ` [PATCH V6 09/10] cxl/mem: Retry reading CDAT on failure ira.weiny
2022-02-01 18:59 ` Ben Widawsky
2022-02-01 22:31 ` Ira Weiny
2022-02-04 13:20 ` Jonathan Cameron
2022-02-01 7:19 ` [PATCH V6 10/10] cxl/cdat: Parse out DSMAS data from CDAT table ira.weiny
2022-02-01 19:05 ` Ben Widawsky
2022-02-01 22:37 ` Ira Weiny
2022-02-04 13:33 ` Jonathan Cameron
2022-02-04 13:41 ` Jonathan Cameron
2022-02-04 13:40 ` Jonathan Cameron
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