From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1EA8AC4332F for ; Wed, 30 Mar 2022 23:59:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351895AbiCaABM (ORCPT ); Wed, 30 Mar 2022 20:01:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55836 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241723AbiCaABM (ORCPT ); Wed, 30 Mar 2022 20:01:12 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 046A75FF20; Wed, 30 Mar 2022 16:59:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648684766; x=1680220766; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=iM/jtk18lR5TcABvKACLWPTqsKQj80c7xfx3QloJ7pY=; b=XByax4e1OgRxQiZlIQpoWg7+ITn0I1vekCPjVEAk5XdB7IaawdwCX1e2 jWP3sDf8VbeGXw4+VX4ftEfCcq9Mqiw2CtTqR3KTJWWmaKEoI6Z9tWs1k UizP+Kv5XD4V1PfF501zNYGPtepv8rm04GBI+hsG/yHZvjWG+YuVRgkGR NSGeXGXmwmQ1HYLdjKhPvPiqNH7kUrlMFQ2su14ZqVZbyz0+s9MV9x9LM qrmJa5Bll7FXk8+FZPVglgTbIUVpJBrE87dzmIA1NV5cXbY8zpvWWvn07 lMYkQ/t7OUsXdvG2KZdShuy9nfoly7aNdpMQn4rLNWowjkdsGwIkWdUWP g==; X-IronPort-AV: E=McAfee;i="6200,9189,10302"; a="284586970" X-IronPort-AV: E=Sophos;i="5.90,223,1643702400"; d="scan'208";a="284586970" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2022 16:59:25 -0700 X-IronPort-AV: E=Sophos;i="5.90,223,1643702400"; d="scan'208";a="565929726" Received: from npeper-mobl1.amr.corp.intel.com (HELO localhost) ([10.212.16.15]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2022 16:59:24 -0700 From: ira.weiny@intel.com To: Dan Williams , Bjorn Helgaas , Jonathan Cameron Cc: Alison Schofield , Vishal Verma , Ira Weiny , Ben Widawsky , linux-kernel@vger.kernel.org, linux-cxl@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH V7 01/10] PCI: Add vendor ID for the PCI SIG Date: Wed, 30 Mar 2022 16:59:11 -0700 Message-Id: <20220330235920.2800929-2-ira.weiny@intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330235920.2800929-1-ira.weiny@intel.com> References: <20220330235920.2800929-1-ira.weiny@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-cxl@vger.kernel.org From: Jonathan Cameron This ID is used in DOE headers to identify protocols that are defined within the PCI Express Base Specification, PCIe r6.0, sec 6.30.1.1 table 6-32. Acked-by: Bjorn Helgaas Reviewed-by: Dan Williams Signed-off-by: Jonathan Cameron --- include/linux/pci_ids.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index aad54c666407..bb5eaf8f973d 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -149,6 +149,7 @@ #define PCI_CLASS_OTHERS 0xff /* Vendors and devices. Sort key: vendor first, device next. */ +#define PCI_VENDOR_ID_PCI_SIG 0x0001 #define PCI_VENDOR_ID_LOONGSON 0x0014 -- 2.35.1