From: Fan Ni <fan.ni@samsung.com>
To: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
"Michael Tsirkin" <mst@redhat.com>,
"linux-cxl@vger.kernel.org" <linux-cxl@vger.kernel.org>,
"linuxarm@huawei.com" <linuxarm@huawei.com>,
"Ira Weiny" <ira.weiny@intel.com>,
"Alison Schofield" <alison.schofield@intel.com>,
"Michael Roth" <michael.roth@amd.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Dave Jiang" <dave.jiang@intel.com>,
"Markus Armbruster" <armbru@redhat.com>,
"Daniel P . Berrangé" <berrange@redhat.com>,
"Eric Blake" <eblake@redhat.com>,
"Mike Maslenkin" <mike.maslenkin@gmail.com>,
"Marc-André Lureau" <marcandre.lureau@redhat.com>,
"Thomas Huth" <thuth@redhat.com>
Subject: Re: [RESEND PATCH v6 5/8] hw/mem/cxl-type3: Add AER extended capability
Date: Mon, 6 Mar 2023 17:52:08 +0000 [thread overview]
Message-ID: <20230306175207.GE1489326@bgt-140510-bm03> (raw)
In-Reply-To: <20230302133709.30373-6-Jonathan.Cameron@huawei.com>
On Thu, Mar 02, 2023 at 01:37:06PM +0000, Jonathan Cameron wrote:
> This enables AER error injection to function as expected.
> It is intended as a building block in enabling CXL RAS error injection
> in the following patches.
>
> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Reviewed-by: Dave Jiang <dave.jiang@intel.com>
> ---
Reviewed-by: Fan Ni <fan.ni@samsung.com>
> hw/mem/cxl_type3.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index 217a5e639b..6cdd988d1d 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -250,6 +250,7 @@ static void ct3d_config_write(PCIDevice *pci_dev, uint32_t addr, uint32_t val,
>
> pcie_doe_write_config(&ct3d->doe_cdat, addr, val, size);
> pci_default_write_config(pci_dev, addr, val, size);
> + pcie_aer_write_config(pci_dev, addr, val, size);
> }
>
> /*
> @@ -452,8 +453,19 @@ static void ct3_realize(PCIDevice *pci_dev, Error **errp)
> cxl_cstate->cdat.free_cdat_table = ct3_free_cdat_table;
> cxl_cstate->cdat.private = ct3d;
> cxl_doe_cdat_init(cxl_cstate, errp);
> +
> + pcie_cap_deverr_init(pci_dev);
> + /* Leave a bit of room for expansion */
> + rc = pcie_aer_init(pci_dev, PCI_ERR_VER, 0x200, PCI_ERR_SIZEOF, NULL);
> + if (rc) {
> + goto err_release_cdat;
> + }
> +
> return;
>
> +err_release_cdat:
> + cxl_doe_cdat_release(cxl_cstate);
> + g_free(regs->special_ops);
> err_address_space_free:
> address_space_destroy(&ct3d->hostmem_as);
> return;
> @@ -465,6 +477,7 @@ static void ct3_exit(PCIDevice *pci_dev)
> CXLComponentState *cxl_cstate = &ct3d->cxl_cstate;
> ComponentRegisters *regs = &cxl_cstate->crb;
>
> + pcie_aer_exit(pci_dev);
> cxl_doe_cdat_release(cxl_cstate);
> g_free(regs->special_ops);
> address_space_destroy(&ct3d->hostmem_as);
> --
> 2.37.2
>
>
next prev parent reply other threads:[~2023-03-06 17:53 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-02 13:37 [RESEND PATCH v6 0/8] hw/cxl: RAS error emulation and injection Jonathan Cameron
2023-03-02 13:37 ` [RESEND PATCH v6 1/8] hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register Jonathan Cameron
[not found] ` <CGME20230306172108uscas1p1b96bacd10b120f3fd93c3309ac2b8880@uscas1p1.samsung.com>
2023-03-06 17:21 ` Fan Ni
2023-05-02 8:54 ` Michael S. Tsirkin
2023-03-02 13:37 ` [RESEND PATCH v6 2/8] hw/pci/aer: Add missing routing for AER errors Jonathan Cameron
[not found] ` <CGME20230306172146uscas1p2e9446294d8b850a1bbcd0e0d4302b603@uscas1p2.samsung.com>
2023-03-06 17:21 ` Fan Ni
2023-03-02 13:37 ` [RESEND PATCH v6 3/8] hw/pci-bridge/cxl_root_port: Wire up AER Jonathan Cameron
[not found] ` <CGME20230306173743uscas1p1f464bb8a53859927472b90f7f9e017c9@uscas1p1.samsung.com>
2023-03-06 17:37 ` Fan Ni
2023-03-02 13:37 ` [RESEND PATCH v6 4/8] hw/pci-bridge/cxl_root_port: Wire up MSI Jonathan Cameron
[not found] ` <CGME20230306175133uscas1p163baf7c881e373c5a5db0805fa83fdd1@uscas1p1.samsung.com>
2023-03-06 17:51 ` Fan Ni
2023-03-02 13:37 ` [RESEND PATCH v6 5/8] hw/mem/cxl-type3: Add AER extended capability Jonathan Cameron
[not found] ` <CGME20230306175209uscas1p2be7df0b3ca2b2002f1a47b2125e35c08@uscas1p2.samsung.com>
2023-03-06 17:52 ` Fan Ni [this message]
2023-03-02 13:37 ` [RESEND PATCH v6 6/8] hw/cxl: Fix endian issues in CXL RAS capability defaults / masks Jonathan Cameron
[not found] ` <CGME20230306175232uscas1p18d8022fab9b5bd5a10a367a6b597aee4@uscas1p1.samsung.com>
2023-03-06 17:52 ` Fan Ni
2023-03-02 13:37 ` [RESEND PATCH v6 7/8] hw/pci/aer: Make PCIE AER error injection facility available for other emulation to use Jonathan Cameron
[not found] ` <CGME20230306175327uscas1p15622b1d859a60b2cc5d9df70182e35fe@uscas1p1.samsung.com>
2023-03-06 17:53 ` Fan Ni
2023-03-02 13:37 ` [RESEND PATCH v6 8/8] hw/mem/cxl_type3: Add CXL RAS Error Injection Support Jonathan Cameron
2023-03-07 17:22 ` Michael S. Tsirkin
[not found] ` <CGME20230307192642uscas1p15caa7ff372247e96544265fbd031d83e@uscas1p1.samsung.com>
2023-03-07 19:26 ` Fan Ni
2023-03-08 1:34 ` Michael S. Tsirkin
2023-03-14 11:53 ` Jonathan Cameron
2023-03-06 21:57 ` [RESEND PATCH v6 0/8] hw/cxl: RAS error emulation and injection Michael S. Tsirkin
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