messages from 2021-03-24 14:18:19 to 2021-05-10 17:32:50 UTC [more...]
[PATCH] cxl: Rename mem to pci
2021-05-10 17:29 UTC (2+ messages)
[PATCH v3 0/8] CXL Port Enumeration and Plans for v5.14
2021-05-10 17:22 UTC (17+ messages)
` [PATCH 1/8] cxl/mem: Move some definitions to mem.h
` [PATCH 2/8] cxl/mem: Introduce 'struct cxl_regs' for "composable" CXL devices
` [PATCH 3/8] cxl/core: Rename bus.c to core.c
` [PATCH 4/8] cxl/core: Refactor CXL register lookup for bridge reuse
` [PATCH 5/8] cxl/acpi: Introduce ACPI0017 driver and cxl_root
` [PATCH 6/8] cxl/Kconfig: Default drivers to CONFIG_CXL_BUS
` [PATCH 7/8] cxl/port: Introduce cxl_port objects
` [PATCH 8/8] cxl/acpi: Add module parameters to stand in for ACPI tables
[RFC PATCH v3 0/4] PCI Data Object Exchange support + CXL CDAT
2021-05-07 23:10 UTC (8+ messages)
` [RFC PATCH v3 1/4] PCI: Add vendor ID for the PCI SIG
` [RFC PATCH v3 2/4] PCI/doe: Add Data Object Exchange support
` [RFC PATCH v3 3/4] cxl/mem: Add CDAT table reading from DOE
` [RFC PATCH v3 4/4] cxl/mem: Add a debug parser for CDAT commands
CXL HDM alignment
2021-05-07 1:43 UTC
[PATCH 0/4] Map register blocks individually
2021-05-06 22:36 UTC (5+ messages)
` [PATCH 1/4] cxl/mem: Fully decode device capability header
` [PATCH 2/4] cxl/mem: Reserve all device regions at once
` [PATCH 3/4] cxl/mem: Introduce cxl_decode_register_block()
` [PATCH 4/4] cxl/mem: Map registers based on capabilities
Get back To Me
2021-05-01 9:22 UTC
CXL mailbox background command
2021-04-30 1:42 UTC (5+ messages)
CXL mailbox background command
2021-04-29 1:24 UTC
[PATCH v5 cxl2.0-v3-doe 2/6] include/hw/pci: headers for PCIe DOE
2021-04-28 13:47 UTC (4+ messages)
` [PATCH v5 cxl2.0-v3-doe 3/6] hw/pci: PCIe Data Object Exchange implementation
` [PATCH v5 cxl2.0-v3-doe 4/6] cxl/compliance: CXL Compliance "
` [PATCH v5 cxl2.0-v3-doe 5/6] cxl/cdat: CXL CDAT "
[ACPI Code First ECN v2]: Generic Port, performace data for hotplug memory
2021-04-20 17:30 UTC (9+ messages)
[GIT PULL] cxl fixes for v5.12-rc8 / final
2021-04-17 17:02 UTC (2+ messages)
[PATCH] cxl/mem: Fix memory device capacity probing
2021-04-17 0:54 UTC (2+ messages)
[PATCH 1/3] cxl/mem: Fix register block offset calculation
2021-04-16 2:49 UTC (10+ messages)
` [PATCH 2/3] cxl/mem: Print unknown capability IDs as hex
` [PATCH 3/3] cxl/mem: Demarcate vendor specific capability IDs
` [PATCH v2] cxl/mem: Fix register block offset calculation
CXL Trees for linux-next
2021-04-16 2:42 UTC (5+ messages)
[PATCH 0/7] Enumerate HDM Decoder registers
2021-04-16 0:25 UTC (21+ messages)
` [PATCH 1/7] cxl/mem: Use dev instead of pdev->dev
` [PATCH 2/7] cxl/mem: Split creation from mapping in probe
` [PATCH 3/7] cxl/mem: Move register locator logic into reg setup
` [PATCH 4/7] cxl/mem: Get rid of @cxlm.base
` [PATCH 5/7] cxl/mem: Move device register setup
` [PATCH 6/7] cxl/mem: Create a helper to setup device regs
` [PATCH 7/7] cxl: Add HDM decoder capbilities
[PATCH v2 0/8] CXL Port Enumeration
2021-04-15 20:53 UTC (26+ messages)
` [PATCH v2 1/8] cxl/mem: Move some definitions to mem.h
` [PATCH v2 2/8] cxl/mem: Introduce 'struct cxl_regs' for "composable" CXL devices
` [PATCH v2 3/8] cxl/core: Rename bus.c to core.c
` [PATCH v2 4/8] cxl/core: Refactor CXL register lookup for bridge reuse
` [PATCH v2 5/8] cxl/acpi: Introduce ACPI0017 driver and cxl_root
` [PATCH v2 6/8] cxl/Kconfig: Default drivers to CONFIG_CXL_BUS
` [PATCH v2 7/8] cxl/port: Introduce cxl_port objects
` [PATCH v2 8/8] cxl/acpi: Add module parameters to stand in for ACPI tables
[RFC PATCH v2 0/4] PCI Data Object Exchange support + CXL CDAT
2021-04-14 18:50 UTC (11+ messages)
` [RFC PATCH v2 1/4] PCI: Add vendor define ID for the PCI SIG
` [RFC PATCH v2 2/4] PCI/doe: Initial support PCI Data Object Exchange
` [RFC PATCH v2 3/4] cxl/mem: Add CDAT table reading from DOE
` [RFC PATCH v2 4/4] cxl/mem: Add a debug parser for CDAT commands
[PATCH] cxl/mem: Add media provisioning required commands
2021-04-14 12:36 UTC (2+ messages)
[PATCH] cxl/mem: Clarify UAPI documentation
2021-04-14 12:37 UTC (2+ messages)
[PATCH v4 cxl-2.0-doe 1/3] PCIe Data Object Exchange implementation
2021-04-09 15:27 UTC (3+ messages)
` [PATCH v4 cxl-2.0-doe 2/3] CXL "
` [PATCH v4 cxl-2.0-doe 3/3] PCIe standard header for DOE
[PATCH v4 0/4] cxl/mem: Fix memdev device setup
2021-04-01 14:33 UTC (5+ messages)
` [PATCH v4 1/4] cxl/mem: Use sysfs_emit() for attribute show routines
` [PATCH v4 2/4] cxl/mem: Fix synchronization mechanism for device removal vs ioctl operations
` [PATCH v4 3/4] cxl/mem: Do not rely on device_add() side effects for dev_set_name() failures
` [PATCH v4 4/4] cxl/mem: Disable cxl device power management
[PATCH v3 0/4] cxl/mem: Fix memdev device setup
2021-03-31 16:32 UTC (11+ messages)
` [PATCH v3 1/4] cxl/mem: Use sysfs_emit() for attribute show routines
` [PATCH v3 2/4] cxl/mem: Fix synchronization mechanism for device removal vs ioctl operations
` [PATCH v3 3/4] cxl/mem: Do not rely on device_add() side effects for dev_set_name() failures
` [PATCH v3 4/4] cxl/mem: Disable cxl device power management
Bidding invitation
2021-03-31 7:11 UTC
[PATCH v2 0/4] cxl/mem: Fix memdev device setup
2021-03-30 22:09 UTC (18+ messages)
` [PATCH v2 1/4] cxl/mem: Use sysfs_emit() for attribute show routines
` [PATCH v2 2/4] cxl/mem: Fix synchronization mechanism for device removal vs ioctl operations
` [PATCH v2 3/4] cxl/mem: Do not rely on device_add() side effects for dev_set_name() failures
` [PATCH v2 4/4] cxl/mem: Disable cxl device power management
[PATCH 0/4] cxl/mem: Fix memdev device setup
2021-03-30 4:48 UTC (11+ messages)
` [PATCH 1/4] cxl/mem: Use sysfs_emit() for attribute show routines
` [PATCH 2/4] cxl/mem: Fix cdev_device_add() error handling
` [PATCH 3/4] cxl/mem: Do not rely on device_add() side effects for dev_set_name() failures
` [PATCH 4/4] cxl/mem: Disable cxl device power management
[PATCH 0/8] CXL Port Enumeration
2021-03-29 19:01 UTC (12+ messages)
` [PATCH 1/8] cxl/mem: Move some definitions to mem.h
` [PATCH 2/8] cxl/mem: Introduce 'struct cxl_regs'
` [PATCH 3/8] cxl/core: Rename bus.c to core.c
` [PATCH 4/8] cxl/core: Refactor CXL register lookup for bridge reuse
` [PATCH 5/8] cxl/acpi: Introduce ACPI0017 driver and cxl_root
` [PATCH 6/8] cxl/Kconfig: Default drivers to CONFIG_CXL_BUS
` [PATCH 7/8] cxl/port: Introduce cxl_port objects
` [PATCH 8/8] cxl/acpi: Add module parameters to stand in for ACPI tables
[PATCH] cxl/mem: Force array size of mem_commands[] to CXL_MEM_COMMAND_ID_MAX
2021-03-25 8:12 UTC (5+ messages)
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